zslwyuan / amf-placer Goto Github PK

Hi. I'm now working on a project and want to extend AMF-Placer to another FPGA device (namely, ZCU104), I'm wondering where should I get the device layout of ZCU104(or other device) such that I can modify the parser and extract the device location?
Thanks a lot!

INFO: [DRC 23-27] Running DRC with 8 threads
ERROR: [DRC CASC-31] Cascade crosses rbrk: The RAMB36E2 cell design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_11 is cascaded in series to expand the RAMB depth, however the cascade connection crosses a Clock Region. The pin design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_11/CASOREGIMUXA is connected to an ACTIVE net (design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_1_i_1_n_6). This causes a potential hold violation on the dedicated cascade paths between the RAMBs that cannot be corrected. This creates an invalid timing situation. Please take steps to ensure placement of the cascaded RAMB remains inside a single Clock Region or else choose a different implementation style for this RAMB in order to prevent the need for cascading across a Clock Region or the use of this pin.
ERROR: [DRC CASC-31] Cascade crosses rbrk: The RAMB36E2 cell design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_11 is cascaded in series to expand the RAMB depth, however the cascade connection crosses a Clock Region. The pin design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_11/CASOREGIMUXEN_A is connected to an ACTIVE net (design_1_i/DigitRec_0/inst/regslice_both_input_V_U/obuf_inst/test_set_V_ce0). This causes a potential hold violation on the dedicated cascade paths between the RAMBs that cannot be corrected. This creates an invalid timing situation. Please take steps to ensure placement of the cascaded RAMB remains inside a single Clock Region or else choose a different implementation style for this RAMB in order to prevent the need for cascading across a Clock Region or the use of this pin.
ERROR: [DRC CASC-31] Cascade crosses rbrk: The RAMB36E2 cell design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_9 is cascaded in series to expand the RAMB depth, however the cascade connection crosses a Clock Region. The pin design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_9/CASOREGIMUXA is connected to an ACTIVE net (design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_1_i_1_n_6). This causes a potential hold violation on the dedicated cascade paths between the RAMBs that cannot be corrected. This creates an invalid timing situation. Please take steps to ensure placement of the cascaded RAMB remains inside a single Clock Region or else choose a different implementation style for this RAMB in order to prevent the need for cascading across a Clock Region or the use of this pin.
ERROR: [DRC CASC-31] Cascade crosses rbrk: The RAMB36E2 cell design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_9 is cascaded in series to expand the RAMB depth, however the cascade connection crosses a Clock Region. The pin design_1_i/DigitRec_0/inst/test_set_V_U/DigitRec_test_set_V_ram_U/ram_reg_bram_9/CASOREGIMUXEN_A is connected to an ACTIVE net (design_1_i/DigitRec_0/inst/regslice_both_input_V_U/obuf_inst/test_set_V_ce0). This causes a potential hold violation on the dedicated cascade paths between the RAMBs that cannot be corrected. This creates an invalid timing situation. Please take steps to ensure placement of the cascaded RAMB remains inside a single Clock Region or else choose a different implementation style for this RAMB in order to prevent the need for cascading across a Clock Region or the use of this pin.
INFO: [Vivado_Tcl 4-198] DRC finished with 4 Errors
INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
ERROR: [Vivado_Tcl 4-23] Error(s) found during DRC. Placer not run.
INFO: [Common 17-83] Releasing license: Implementation
9 Infos, 0 Warnings, 0 Critical Warnings and 5 Errors encountered.
place_design failed
place_design: Time (s): cpu = 00:00:33 ; elapsed = 00:00:16 . Memory (MB): peak = 12107.438 ; gain = 681.867 ; free physical = 5118 ; free virtual = 26935
ERROR: [Common 17-39] 'place_design' failed due to earlier errors.

while executing

"place_design"
(file "/home/tingyuan/Documents/AMF-Placer/build/dumpData_digitRecognition/DumpCLBPacking-first-0.tcl" line 543053)

Hello! I am following the AMFPlacer because we are doing the MLCAD2023 contest concerning the FPGA Macro placement. Because there is no requirement of timing, we use the AMF-Placer-ICCAD-2021 release. However, when I input "bash build.sh". An error indicates that there are some problems saying that it could not find "Q_WS_WIN", "Q_WS_QWS" and "Q_WS_MAC". The CMakeError.log is as follows:

Determining if the Q_WS_WIN exist failed with the following output:
Change Dir: /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp

Run Build Command(s):/usr/bin/make cmTC_ea17a/fast && /usr/bin/make  -f CMakeFiles/cmTC_ea17a.dir/build.make CMakeFiles/cmTC_ea17a.dir/build
make[1]: Entering directory '/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp'
Building CXX object CMakeFiles/cmTC_ea17a.dir/CheckSymbolExists.cxx.o
/data/ssd/hcli/usr/local/bin/g++   -I/usr/include/qt4  -O3 -fopenmp -O1 -g1    -o CMakeFiles/cmTC_ea17a.dir/CheckSymbolExists.cxx.o -c /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx
/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx: In function ‘int main(int, char**)’:
/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx:8:19: error: ‘Q_WS_WIN’ was not declared in this scope
    8 |   return ((int*)(&Q_WS_WIN))[argc];
      |                   ^~~~~~~~
CMakeFiles/cmTC_ea17a.dir/build.make:85: recipe for target 'CMakeFiles/cmTC_ea17a.dir/CheckSymbolExists.cxx.o' failed
make[1]: *** [CMakeFiles/cmTC_ea17a.dir/CheckSymbolExists.cxx.o] Error 1
make[1]: Leaving directory '/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp'
Makefile:141: recipe for target 'cmTC_ea17a/fast' failed
make: *** [cmTC_ea17a/fast] Error 2


File /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx:
/* */
#include <QtCore/qglobal.h>

int main(int argc, char** argv)
{
  (void)argv;
#ifndef Q_WS_WIN
  return ((int*)(&Q_WS_WIN))[argc];
#else
  (void)argc;
  return 0;
#endif
}
Determining if the Q_WS_QWS exist failed with the following output:
Change Dir: /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp

Run Build Command(s):/usr/bin/make cmTC_28b9d/fast && /usr/bin/make  -f CMakeFiles/cmTC_28b9d.dir/build.make CMakeFiles/cmTC_28b9d.dir/build
make[1]: Entering directory '/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp'
Building CXX object CMakeFiles/cmTC_28b9d.dir/CheckSymbolExists.cxx.o
/data/ssd/hcli/usr/local/bin/g++   -I/usr/include/qt4  -O3 -fopenmp -O1 -g1    -o CMakeFiles/cmTC_28b9d.dir/CheckSymbolExists.cxx.o -c /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx
/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx: In function ‘int main(int, char**)’:
/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx:8:19: error: ‘Q_WS_QWS’ was not declared in this scope
    8 |   return ((int*)(&Q_WS_QWS))[argc];
      |                   ^~~~~~~~
CMakeFiles/cmTC_28b9d.dir/build.make:85: recipe for target 'CMakeFiles/cmTC_28b9d.dir/CheckSymbolExists.cxx.o' failed
make[1]: *** [CMakeFiles/cmTC_28b9d.dir/CheckSymbolExists.cxx.o] Error 1
make[1]: Leaving directory '/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp'
Makefile:141: recipe for target 'cmTC_28b9d/fast' failed
make: *** [cmTC_28b9d/fast] Error 2


File /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx:
/* */
#include <QtCore/qglobal.h>

int main(int argc, char** argv)
{
  (void)argv;
#ifndef Q_WS_QWS
  return ((int*)(&Q_WS_QWS))[argc];
#else
  (void)argc;
  return 0;
#endif
}
Determining if the Q_WS_MAC exist failed with the following output:
Change Dir: /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp

Run Build Command(s):/usr/bin/make cmTC_64c06/fast && /usr/bin/make  -f CMakeFiles/cmTC_64c06.dir/build.make CMakeFiles/cmTC_64c06.dir/build
make[1]: Entering directory '/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp'
Building CXX object CMakeFiles/cmTC_64c06.dir/CheckSymbolExists.cxx.o
/data/ssd/hcli/usr/local/bin/g++   -I/usr/include/qt4  -O3 -fopenmp -O1 -g1    -o CMakeFiles/cmTC_64c06.dir/CheckSymbolExists.cxx.o -c /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx
/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx: In function ‘int main(int, char**)’:
/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx:8:19: error: ‘Q_WS_MAC’ was not declared in this scope
    8 |   return ((int*)(&Q_WS_MAC))[argc];
      |                   ^~~~~~~~
CMakeFiles/cmTC_64c06.dir/build.make:85: recipe for target 'CMakeFiles/cmTC_64c06.dir/CheckSymbolExists.cxx.o' failed
make[1]: *** [CMakeFiles/cmTC_64c06.dir/CheckSymbolExists.cxx.o] Error 1
make[1]: Leaving directory '/data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp'
Makefile:141: recipe for target 'cmTC_64c06/fast' failed
make: *** [cmTC_64c06/fast] Error 2


File /data/ssd/qluo/AMF-Placer-ICCAD-2021/build/CMakeFiles/CMakeTmp/CheckSymbolExists.cxx:
/* */
#include <QtCore/qglobal.h>

int main(int argc, char** argv)
{
  (void)argv;
#ifndef Q_WS_MAC
  return ((int*)(&Q_WS_MAC))[argc];
#else
  (void)argc;
  return 0;
#endif
}

I have checked that we have already installed Qt 4 and Qt 5. And I do not know how to solve this problem. Could you help me to see why it would happen and how to deal with it.

Thanks,
Qin

The initial floorplanning will heavily impact the final placement. The net weights during initial placement are a big problem!

During partitioning, we should consider the interconnection density!

We received some feedback from the community and we are following up and will release an updated version with comprehensive timing-driven optimization as soon as possible.

Please don't hesitate to contact us (both issue threads and emails are ok) if you encounter problems with our AMF-Placer because sometimes the problems could be our BUG instead of your mistake. If necessary we could release a temporary branch for you to solve the problems. ^_^

This url "https://faculty.cc.gatech.edu/~umit/PaToH/patoh-Linux-x86_64.tar.gz" could not be reached anymore when build the project, could you share this file again?

Hi,I am using AMF2.0 to reproduce the experiment about vivado,but i can't find the desigin and device file for vivado to run the flow ,"2_6_LoadtheOutputPlacementinVivado Load the Output Placement in Vivado".So could you please provide the original design and device file like .v or .xpr format ? THANK YOU !!!

we have enabled timing-driven FPGA placement in AMF-Placer2 and it will be released publicly in Oct 2022.