Comments (3)
@ueqri : I'm going to assign this to you so you can write some documentation on how to run perf on vtr to go in our developer guide (markup format, built with read the docs)
from vtr-verilog-to-routing.
@vaughnbetz Sure! Will be done within this week :)
from vtr-verilog-to-routing.
Thanks Hang.
from vtr-verilog-to-routing.
Related Issues (20)
- VTR Quick Start Guide Inconsistencies HOT 2
- Change ODIN II Quick Start Walkthrough to Parmys HOT 2
- Overuse report with flat routing
- Remove Uses of std::iterator from VTR Libraries HOT 7
- Unreachable code in vpr/src/route/connection_router.cpp HOT 2
- Upgrade Self-Hosted Runners to Node20 HOT 2
- Can Titan benchmarks be used for power analysis? HOT 4
- CI artifacts are not available for download when a CI test fails HOT 3
- Issue with git submodule update --init Command HOT 1
- Update documentation (and code if needed) to make placement constraints 3D HOT 1
- Update documentation for 3D arch switches
- Test rr-graph write out and read in with a 3D architecture.
- Prevent running the CI if only the docs are updated HOT 2
- Missing Output Port in BLIF File Generation Using ABC HOT 1
- Constant and inverter "replication" during packing HOT 2
- Remove has_path_to_sink
- high fanout routing to heap code -- only count CHANX and CHANY nodes to determine if enough has been added. HOT 4
- Loosen the minimum channel width and related metric pass characteristics for small circuits
- See if simplifying the placement cost function slightly would speed up placement.
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