Comments (4)
Tagging @mirjanastojilovic as she may be interested in this one.
from vtr-verilog-to-routing.
Thanks, Vaughn!
from vtr-verilog-to-routing.
I think it makes sense to use chan_nodes_added in the tests (line 1057) and delete nodes_added variable.
It appears (line 1033) that only the flat router checks if the node is a wire before incrementing chan_nodes_added. Unless I am missing something, I would expect this check to be performed irrespective of whether the router is flat or not. What do you think?
from vtr-verilog-to-routing.
Agreed.
from vtr-verilog-to-routing.
Related Issues (20)
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