![](https://private-user-images.githubusercontent.com/29487339/298427585-75ccc568-4f17-48a1-b2af-20211f98896c.png?jwt=eyJhbGciOiJIUzI1NiIsInR5cCI6IkpXVCJ9.eyJpc3MiOiJnaXRodWIuY29tIiwiYXVkIjoicmF3LmdpdGh1YnVzZXJjb250ZW50LmNvbSIsImtleSI6ImtleTUiLCJleHAiOjE3MjM1NjUzODksIm5iZiI6MTcyMzU2NTA4OSwicGF0aCI6Ii8yOTQ4NzMzOS8yOTg0Mjc1ODUtNzVjY2M1NjgtNGYxNy00OGExLWIyYWYtMjAyMTFmOTg4OTZjLnBuZz9YLUFtei1BbGdvcml0aG09QVdTNC1ITUFDLVNIQTI1NiZYLUFtei1DcmVkZW50aWFsPUFLSUFWQ09EWUxTQTUzUFFLNFpBJTJGMjAyNDA4MTMlMkZ1cy1lYXN0LTElMkZzMyUyRmF3czRfcmVxdWVzdCZYLUFtei1EYXRlPTIwMjQwODEzVDE2MDQ0OVomWC1BbXotRXhwaXJlcz0zMDAmWC1BbXotU2lnbmF0dXJlPTQ4OWUxZjc1NTc0ZDJkMjdmZmNjYTYzZjE3NmE4MjkxODUyOThiY2Y2MjMxYzg3MTM3MTI0MDI5NDAyNDgzMmYmWC1BbXotU2lnbmVkSGVhZGVycz1ob3N0JmFjdG9yX2lkPTAma2V5X2lkPTAmcmVwb19pZD0wIn0.f-1LXbr164j-Uk03h1MaOC3mnhA5qNqQ6GZi4jaonKY)
Why it work?
1 bit flip-flop the basic building block of a R-2R DAC hences it is a DAC because it can convert logic to voltage.
Of cause it is just limited to 0 - low voltage, 1 - high voltage.
When it is modulated with a carrier frequency it start to make all senses that it can be a really good DAC.
Why two stages?
The best answer can be referenced from : https://www.beis.de/Elektronik/DeltaSigma/1stOrderDisadvantages.html https://www.youtube.com/embed/4SIJTl5du60?start=1300
In short when 0 or max (-ve, +ve) is insert to the DAC, the output will result in high tone amputitude that can be reduce via 2 stages.
Oscillscope Measure:
Single Stage Delta-Sigma DAC:
What bitwidth is required on the first stage?
This is commonly considered with i.e. 16bit Input + 2bit.
Two Stage Delta-Sigma DAC:
There are a major question when designing the ΔΣ DAC:
What bitwidth is required on the second stage?
My approach is considering 1st stage output i.e. [16bit + 2bit] + over_sample_rate (i.e. 2^[6] 6bit).
over_sample_rate for example 2^6 or above