Comments (3)
This is a typo in the guide. You should indeed just execute "run -all" or "run -a". The "Failure: Program completed!" is not a problem. This will always print when the processor has finished running the executable that you have specified. Do you see the expected output from the program you're simulating? The default program should print "Hello from ESP!".
from esp.
Thank you for the quick response! Yes, I do see "Hello from ESP!" before the failure part. Does that mean everything ran as it should?
from esp.
Yes, the simulation is running properly then.
from esp.
Related Issues (20)
- Is this project dead HOT 1
- Vivado HLS failed to package/export IP due to Xilinx's bug HOT 2
- A Minor Mistake in Documentation About Setting Environments for CentOS 7 HOT 1
- X11 error for non-root users on CentOS HOT 1
- Reading Clock cycles HOT 1
- How to change the clock frequency of a SoC prototyped on a xc7v2000t profpga
- P2P only works if accelerators are set to operate in non-coherent mode HOT 1
- State of ZCU102 support HOT 2
- Cannot find required source file '*_localmem_asic.sv' HOT 3
- Xcelium cannot simulate for single-core(Ibex) SoC using the repo configuration from official Docker image HOT 2
- Internal compiler error when trying to build risc-v toolchain for ariane processor
- Trying to make single-core SoC tutorial work for Nexys A7-100T HOT 2
- Can't Program Xilinx VC707 Board in Single-Core SoC Tutorial HOT 4
- Missing NV_NVDLA.verilog and Collecting generated RTL files HOT 4
- Alternatives of listed FPGA boards HOT 1
- How to use the debug signal of an accelerator
- NVDLA does not work with Leon3 on 64-bit DMA NoC
- Bootloader hangs on ESP soc includes nvdla on VCU128 HOT 1
- Clarification on the ESP NoC HOT 1
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from esp.