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Home Page: https://riscv-atom.readthedocs.io
License: MIT License
An open-source 32-bit RISC-V soft-core processor
Home Page: https://riscv-atom.readthedocs.io
License: MIT License
make libs fails with atombones target because GPIOs are not present in atombones and hence gpio.c compilation shows error.
Hello,
We have tried to implement RV32M extension instruction, please have a look. The extension instruction also passes riscv-test benchmark. If you want your riscv-atom to support RV32M, you can look at out code as an reference.
The finished version is in branch stable
. Here is the Link 1, Link 2.
Best Regards ๐
There is a redundancy in the makefile while declaring Verilog files for the targets - atombones and hydrogensoc. Clearly these targets have some files that are needed by both and some files that only one of the targets requires.
All verbose information should be printed on stderr stream while the program's output should be printed on the stdout. Therefore one can easily route them to two different files if needed.
Instead of installing toolchain in system.
Just have it downloaded in workspace.
It will be easy for system maintenance and cleaning up.
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