Comments (2)
@asb did you have a more concrete proposal for this? Is this something done in the ISA which we can repeat the pattern?
from riscv-debug-spec.
I can think of several variations of "nonstandard":
- There is some extra functionality added. In that case it makes sense to report the version that you are compatible with, and have some other mechanism to discover/access the extra functionality.
- Your debug implementation is so different that it doesn't make sense to use the spec. In that case, why do you even have those version numbers in that place?
- You're using parts of the spec (eg. the JTAG transport to access a Debug Module) but not others (eg. the JTAG transport). In that case you might need a special version in the Debug Module indicating that even though the transport is compatible, the rest of the debug system is not.
Not super important, but if we want people to be able to pick and choose different layers in our debug solution, nice to have. Easiest way is to just spec it and be done. It's cheap.
from riscv-debug-spec.
Related Issues (20)
- Clarification of register needed HOT 1
- Does *stateen0[57] control mscontext if implemented? HOT 2
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- `maskmax6` discovery may need clarification HOT 2
- A typo in [5.4. Native Triggers] HOT 1
- How to halt or resume multiple harts simultaneously? HOT 4
- Stored value availability to TM in case of AMOs HOT 6
- Hit bit interaction with action conflict when several triggers of the same priority match HOT 3
- How to reset the DM on the first connection on both 0.13 and 1.0 spec versions HOT 7
- Cross Trigger definition in RISC-V HOT 3
- Trigger match on csrrs/csrrc to tdata1 HOT 13
- Why debugger lose control of the hart while executing a program not terminate with an ebreak instruction
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- Minor typo + Cannot open PR HOT 2
- Multiple mcontrol6 triggers match on same instruction with different actions and timings HOT 1
- Can tselect be written with an invalid index HOT 2
- Value of tinfo when selected trigger does not exist HOT 2
- Missing state names HOT 1
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from riscv-debug-spec.