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CV32E40X Design-Verification environment

License: Other

Shell 0.11% C++ 0.06% Python 0.35% C 16.51% Tcl 0.46% Assembly 66.96% SystemVerilog 14.84% Makefile 0.72%

cv32e40x-dv's Introduction

Verification Environment for the CV32E40X CORE-V processor core.

Screenshot

Directories:

  • bsp: the "board support package" for test-programs compiled/assembled/linked for the CV32E40X.
  • env: the UVM environment class and its associated infrastrucutre.
  • sim: directory where you run the simulations.
  • fv: directory where you run formal verification.
  • tb: the Testbench module that instanitates the core.
  • tests: this is where all the testcases are.

There are README files in each directory with additional information.

cv32e40x-dv's People

Contributors

datum-dpoulin avatar duncangraham-imperas avatar eroom1966 avatar halfdan-dolva avatar leemango1998 avatar mikeopenhwgroup avatar nicolas-gaudin avatar silabs-anvesten avatar silabs-arjanb avatar silabs-hfegran avatar silabs-inhaahje avatar silabs-krdosvik avatar silabs-kun avatar silabs-mateilga avatar silabs-oivind avatar silabs-oysteink avatar silabs-robin avatar strichmo avatar

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