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beebfpga's Issues

24MHz clock clarification

clock_24 <= not clock_24;

Can you explain why divided 48MHz will be phase locked while directly deriving 24MHz from PLL won't?
Basically 32,24,48 - all of these frequencies have common dividend 8, so PLL actually generates all of them by simple internal counter from common frequency.

Mode 7 cursor alignment

Hi Again

Question to see whether this is in my port or your original. In Mode 7 the cursor is about 1 or 2 pixels left of where it should be in my MiSTer port. Do you see the same thing?

Do you know where the cursor alignment between the CRTC and the teletext chip is controlled?

Thanks

Possible hardware bug with Mode 7

On original hardware, this program displays the text in red.
10 MODE 7
20 PRINT CHR$(129)"RED"

However, in your core running on my Next, it displays in blue.

Question: Timing Changes

Hi David - hope you are good.

I am thinking about updating my MiSTER core to catch-up with your last round of updates to BeebFPGA. I am trying to get a handle on what you've changed and why.

One specific question: commits a9cf3b5 and 65cd9ac mention changes to sub-cycle timing to align to the Master. Would these also be applicable to the classic Beeb, or does that have a different sub-cycle timing that would best be handled differently in the emulation?

Thanks as always.

Keyboard not responsive on Mr EE (Micropower)

Hi - Same background as before - testing from the Retroclinic pack on my MiSTer port. Let me know if you can't reproduce on your platforms.

On Mr EE (Micropower) the keyboard is not responsive in the game (except for the "P" key for pause). Various keys seem to be treated as if they were continually pressed.

Question: MISTer (and Revs bug)

Hi David,

This looks very impressive. I've been playing with the BBC Micro Core on the DE10-nano/MISTer platform which has limitations currently. Your BBC FPGA is considerably ahead. Have you by any chance looked at what it would take to port this package to MISTer? It seems to share common roots with the package there, so it should be transferable I would think.

Thanks

(PS I am lushprojects on the Stardot forum if you prefer to message me there).

Beebs core does not read/mout the MMB file

Hi,
I followed the instructions to set up the Beebs MMB file, which is in the root of the SD card (tried with FAT16 and FAT32), but the result is that the core can't see the drive.

When switching to the drive I get an error saying that there is no drive. This is on a Next device. The file was copied first, after formatting, then all the other files for the Next distro were copied on it, as per instructions. Is there any other steps to perform, that was not mentioned on the instructions? Thanks

Current state of PiTubeDirect on Spectrum Next

Hi, can you please elaborate on the current state of using BeebFpga on the Spectrum Next in conjunction with a PiTubeDirect accelerator? I've managed to build a external coprocessor enabled bitstream by modifying the top-level component (bbc_micro_spec_next.vhd) to use the following configuration:

    generic (
        IncludeAMXMouse    : boolean := true;
        IncludeSPISD       : boolean := true;
        IncludeSID         : boolean := true;
        IncludeMusic5000   : boolean := true;
        IncludeICEDebugger : boolean := true;
        IncludeCoPro6502   : boolean := false;
        IncludeCoProExt    : boolean := true;
        IncludeVideoNuLA   : boolean := true;
        IncludeMaster      : boolean := true
    );

However, when flashing the core and running it, the display gets black after rom loading. PiTubeDirect seems to work, i've run the validation tests from https://github.com/hoglet67/PiTubeDirect/wiki/Validation and they look similar (at least they don't throw any obvious errors).

Is this supposed to work currently?

6522 dissection

Hi! Did you see the 6522 dissection that was done recently?
http://forum.6502.org/viewtopic.php?f=4&t=7241
Did anyone check if there are insights from there that would cause the 6522 implementation here to change?

There is also this twitter thread https://twitter.com/RueNahcMohr/status/1571705526911905793 (which is about shifting in under T2 control) which seems to observe that a cycle of shifting a bit in starts with CB1 high, rather than low. Starting low is what your 6522 does (I tried it out), and also what VICE does. That also leaves CB1 high in idle state after 8 shifts / 16 timer underflows, so there is no need for an extra timer underflow to bring it to idle state again.

But, while comparing your 6522 with this scenario, I noticed a weird thing regarding the shift register. What I'm seeing is that on the falling edge of CB1, the shift register shifts (leaving bit 0 unchanged). On the rising edge of CB1, it corrects bit 0.
This doesn't seem to match with http://forum.6502.org/viewtopic.php?f=4&t=7241#p93990:

In "22) shift register control", we have a 2:1 multiplexer controlled by ACR4.
The output of said multiplexer goes into the LSB of the shift register as SR_IN.
If the shift register shifts in (ACR4=0), the signal from the CB2 pad goes into the LSB.
If the shift register shifts out (ACR4=1), the signal SR_CB2_Q goes into the LSB,
means if the shift register shifts out it does circular shift.

I read that as saying that the shifting and the updating of SR bit 0 happens at the same time.

I used the m6522_tb.vhd testbench program where I replaced the body with

        begin
                wait for 2 us;

                -- Test shifting in under T2 control and observe CB1 (the clock output)
                -- clear interrupt flags
                reg_write(X"D","11111111");

                -- shift register
                reg_write(X"A","00000001");
                -- ACR: SR shifted in, speed set by T2
                reg_write(X"B","00000100");

                -- set T2 to 0002
                reg_write(X"8",X"02");
                reg_write(X"9",X"00");
                -- shift register
                reg_write(X"A","11111111");

                wait for 32 us;
                cb2_in <= '1';
                wait for 16 us;
                cb2_in <= '0';
                wait for 200 us;

                assert false report "end of test" severity error;
                wait;

        end process;

A Question (not an issue)

Sorry to contact you this way but I could not find an email address for you.

I wanted to know the status of the tube interface in your code and can it be used with an external co-processor?
I ask as I am keen to try adding a raspberry pi BBC co-processor to an FPGA emulation of the BBC Micro running on a ZX UNO (Spartan 6 LX9).

Feature request: Keyboard remapping

Turns out that a lot of BBC games use keys like Z/X/:/? for left/right/up/down. This combination does not work well on a Spectrum Next keyboard as it's Z/X/SS+Z/SS+C!

I haven't extensively examined every game but using symbols on the right hand side of the keyboard seems very popular. As an extreme example, Barbarian's second player default controls are (some of these relate to shifted symbols on the Beeb so the ZX keys might not be accurate):

Control BBC key Next key combo
Left > SS+T
Right ? SS+C
Up [ EXT SS+Y
Down * SS+B
Strike £ SS+X

Can we have a way of remapping the keyboard, even a simple toggle which maps some of the symbols to their relative positions on the Next would be sufficient I think. eg, as a hastely knocked together example:
bbcnextkeyb
This looks like it would work with all the games I checked out.

BeebFPGA+Music5000 = Soft Synth.

Assuming you are able to add the Music 5000 FPGA to this design, you'd have a rather versatile soft synth.

(Aside: You also have a B-Em repository, but no way to raise issues on it, Will you consider adding Music 5000 support to your version of B-Em?)

ATOMBusmon compilation

Hi Dave,

Maybe a stupid question, but does the ATOMBusMonitor option compile OK on your platforms?

I haven't spent a lot of time looking at it, but I did a quick try on my port and got errors about duplicate component defintions (6502, 65C02) and then when these were cleaned up another load of errors about multiple drivers for busses connected to the CPU.

Any hints for how to approach porting it?

Thanks

Cursor visible on Arcadians (Acornsoft)

Hi - Same background as before - testing from the Retroclinic pack on my MiSTer port. Let me know if you can't reproduce on your platforms.

On Arcadians (Acornsoft) the cursor is visible in game and on the high score page.

Acornsoft Defender (redux)

I thought it was worth separating the discussion of Defender in to its own issue.

To follow up. Using the verisons on RetroClinic BEEB.MMB File v1.02 for MicroSPI. again:

  • The program called "Planetoid" does work fine
  • The program called "Defender" hangs near game start

I tested on both the AlanD (65C02) and PeterW (6502) cores. Interested if you have the same experience on the different versions.

Beginner's guide

Hi,
I've ported your DE1 version to my FPGA board. Since my FPGA has a lot of BRAM, your whole ROM and RAM are implemented.
Now i see command prompt but have no idea what to do to run the games. I don't see SD card activity at startup, so i guess i need to issue some command to boot from SD card. Is your ROM still requires specific file to be placed first right after format or it's not required anymore? I see i lot of ROM pages are used, so i hope i don't need to have specific to BBC SD card as other cores also require specific file to be the first on card.

I see some mention of BEEB.ROM on some pages but links are all broken today, so i have no chance to get it. Is it required?

So, can you give a short instruction what need to be placed on SD card, What format required for games. How to list/run games on SD card.

Thanks.

Addition of sound sources can overflow

The various sound sources should go into a saturating adder, probably - or something more sophisticated - should not overflow.

The code presently just adds the sound chip, the SID, the disk drive sample and the Music 5000, without headroom and without regard for overflow. See

variable l : std_logic_vector(15 downto 0);

Getting Started

Could you please document good default dip switch settings and how to get this core running on a 31kHz monitor? I saw #4 and the wiki but still couldn't figure out how to get this running.

T65 DI/DO Loopback Question

More a question that an issue:

In the T65 header it says:

--   TAKE CARE you route the DO signal back to the DI signal while R_W_n='0',
--   otherwise some undocumented opcodes won't work correctly.
--   EXAMPLE:
--      CPU : entity work.T65
--          port map (
--              R_W_n   => cpu_rwn_s,
--              [....all other ports....]
--              DI      => cpu_din_s,
--              DO      => cpu_dout_s
--          );
--      cpu_din_s <= cpu_dout_s when cpu_rwn_s='0' else 
--                   [....other sources from peripherals and memories...]

I can't see this in the code. Obviously it works. Am I missing something?

Spec Next: Improve Core Packaging

Ideally we would have:

  • NuLA / Original flavours
  • Master / BBC flavours
  • MMFS v1 / v2 flavours

But eight skews is quite a lot.

We should also automate the crc16 calculation in the release script.

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