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6.0 2.0 0.0 7.5 MB

SoC design targeted at the IceBreaker board

Makefile 2.55% Verilog 25.45% Python 30.29% Assembly 37.40% C 3.43% Batchfile 0.88%
alu cpu verilog yosys next-npr icestorm robin soc processor icebreaker

robin's Introduction

robin

SoC design targeted at the iCEbreaker board

Python files Simulations Libraries Verilog testbenches

Components

The Robin SoC consists of several components, each documented on their own wiki page.

Additionally, the CPU design is being documented on a separate website and progess is reported on a blog

About test results

The badges indicate whether the main python files pass pep8, all instructions can be simulated correctly in the simulator, libc examples can be compiled, assembled and simulated with correct results and lastly whether the verilog testbenches work. Nothing of this does imply that de hardware works, there are separate testcases for that but I cannot run them on GitHub.

Dependencies

  • python3
  • yosys
  • nextpnr-ice40
  • icestorm

Installation

git clone https://github.com/varkenvarken/robin.git
cd robin
git submodule update --init
cd SoC
make

You can then flash the iCEbreaker (if connected to a USB port) with

make flash

It might be a good thing to run the hardware test at that point

cd Test
make
make testhard

robin's People

Contributors

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