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License: Other
Contains files created with Design Spark PCB Capture Software
License: Other
I've been trying to alter the firmware to use the daisychain header to transfer samples to another device via SPI. I've noticed that DAISY_SS picks up a lot of interference from the other SPI lines. Attached is a scope trace of the SPI lines when running unmodified firmware while capturing data from the ADS1299 - note channel 3 (DAISY_SS) is picking up significant interference from the other SPI lines.
Cyton build files missing the BOM. My wife and I were looking to assemble one ourselves.
Could my pull request please be approved or rejected? I am trying to help others with BOM & getting the builds done. I submitted a draft of bill of materials, included relevant information from the openbci docs site, and added gerber files. I submitted a pull request last month and got no response. Thanks!
https://i.imgur.com/Y9bZ8jC.png
Anyone else seeing this?
The plots for the cyton are incomplete, there are no gerbers for silkscreens.
Update silkscreen files for Cyton, Dongle and Daisy
Hi, I wanted to convert this design to a single or two layered PCB. I am comfortable using EAGLE and so I wanted to open the 32bit .pcb and .sch files in EAGLE. I can't seem to find a way to do that. I am able to open and view it in DesignSpark but there is not export option that makes these files compatible with EAGLE. Would love your thoughts on this.
DesignSpark is not open-source friendly. It is proprietary, not cross-platform (windows only), and readily imported into other ECAD software. would recommend porting to librePCB or similar to encourage more contributions and participation.
I saw the schematics to find a 10K ohm resistor and a 1nF cap which means the cut off frequency is 72kHz! I guess you would have to sample at +150Hz to avoid aliasing right? but the default sampling frequency is set to 250Hz.
I saw the ganglion board had a low pass filter at ~150Hz, which to me seems like a better design from that point of view. Why it is different now?
I'm guessing it was an accident.
On arch linux I am unable to open pcb or schematic files - I have attempted using latest versions of geda & associated pcb editor as well as eagle with errors trying to import files on both suggesting wrong file format type. Could additional format types be generated by exporting from DesignSpark in case other formats might work or this might provide debugging info?
From the pcb editor I just get "illegal fileformat" trying to import the pcb file. With Eagle I get "line 1, column 1: Start tag expected." From geda trying to import the schematic I get the following:
Invalid borders specified for theme pixmap:
/usr/share/themes/Breeze/gtk-2.0/../assets/line-h.png,
borders don't fit within the imageinvalid source position for vertical gradient
** Invalid UTF-8 in log message. See stderr or gschem.log.
Because the latter error might be related to the app/system/config I'm submitting a bug report to the app as well, but the former two errors are more consistent with problems with the file or file format. Associated report: https://bugs.archlinux.org/task/54131
It would suck to have to reverse engineer a free & open source/hardware project...
Possibly related issues:
http://openbci.com/forum/index.php?p=/discussion/255/schematic-source-files-for-openbci-boards
#2
Thanks for any recommendations/assistance!
Hello,
I'm having trouble transferring from Schematic to PCB, I keep getting the following errors in the DesignSpark report:
Could not load component "C" package "0402" into target design.
Could not add "C23" component "C" package "0402" to target design.
Could not add "C20" component "C" package "0402" to target design.
Could not load component "BATT" package "SM" into target design.
Could not add "B1" component "BATT" package "SM" to target design.
I'm assuming that packages 0402 and BATT are part of the openBCI library files? Has anyone else run into this issue?
Thanks!
Hello:
I have read the ads1299 document and the cython's schematic, I found that in the ads1299 document, the "bias drive" output signal (pin63 biasout) is feedback to BIAS_INV pin , however, in the cython's schematic the bias drive signal feeds back to BIAS_IN and leave BIAS_INV float. It makes matters? In my understanding, the bias_in pin is used to connect 'BIASOUT' and a special input channel electrode with proper register configuration. So, I think whether the BIASOUT should feedback to BIAS_INV, and maybe connect the BIAS_IN to ground?
hi everyone
i cant find capacitor array CKCL44X7R1H102M085AA, what can we do?
thank you
In the past I downloaded the schematic and it had two pages. In order to make life easier I merged the two pages together.
After doing my own layout in a different schematic CAD while using the DesignSpark schematic as a reference, I came across something wrong. I thought I had accidentally erased something when I deleted the second page.
So I erased everything, uninstalled DesignSpark, cleaned out all the residual references like in the registry, then reinstalled DesignSpark (8) and re-downloaded the Cyton files.
Now there is only one page of schematic and it does not contain PL2 even though it is on the PCB.
Now I'm afraid I might be missing other stuff that won't make it onto my own PCB if the official schematic is not complete.
thanks
(now that I think about it, wasn't here a BCI.project file?)
Does the current daisy module design (which I have already gotten fabbed...) include corrections re the initial design error per here: http://openbci.com/community/daisy-module-re-work/ or do I still need to get the pin corrected? Thanks!
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