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fpga-zynqnet

FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS

fpga_based_cnn

FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.

fpga_caffe

fpga_cnn

Convolutional Neural Net written for implementation on an FPGA

fpga_cnn_train

fpga_image_processing

Image capture, image filtering and image display (VGA) : picture in picture, edge detection, gray image and smooth image

fpga_random_forest

FPGA implementation of SKLearn Random Forest

fpga_test

提取caffe，prototsxt文件和caffemodel文件中的参数，根据FPGA命令格式的要求，设计生成FPGA命令字；根据FPGA内存格式提取并归一化权重和偏置参数。最后在FPGA中实现CNN网路的图片识别，并对识别时间进行加速。

fpgaconvnetmaxeler

Running streaming-based Convolutional Neural Networks on maxeler DFE devices

fpna

Impelementing neural networks in FPGAs

free-tpu

Free TPU for FPGA with Lenet, MobileNet, Squeezenet, Resnet, Inception V3, YOLO V3, and ICNet. Deep learning acceleration using Xilinx zynq (Zedboard or ZC702 ) or kintex-7 to solve image classification, detection, and segmentation problem.

fwnn_fpga

feed-forward neural network acceleration with FPGA

gitlab

haddoc2

Caffe to VHDL - by DREAM research group

handwriting-recognition-using-neural-networks-on-fpga-final-year-project

hls4ml

Machine learning in FPGAs using HLS

hwac_object_tracker

FPGA accelerated TinyYOLO v2 object detection neural network

img_process_vhdl

Image Processing on FPGA using VHDL

interview

📚 C/C++面试基础知识总结

ismartdnn

Light-weighted neural network inference for object detection on small-scale FPGA board

keras-conv1d

Small 1D CNN for testing FPGA deployment

knn-fpga-hls

FPGA implementation of a handwritten digit recognition system based on k-nearest-neighbors (k-NN) classifier algorithm.

leetcode

The optimum C++ solutions for the leetcode

leetcode-1

LeetCode Solutions: A Record of My Problem Solving Journey.( leetcode题解，记录自己的leetcode解题之路。)

leetcodeanimation

Demonstrate all the questions on LeetCode in the form of animation.（用动画的形式呈现解LeetCode题目的思路）

leflow

Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

lenet5_hls

FPGA Accelerator for CNN using Vivado HLS

mace

MACE is a deep learning inference framework optimized for mobile heterogeneous computing platforms.

mnist_fpga

using xilinx xc6slx45 to implement mnist net

mnn

MNN is a lightweight deep neural network inference engine.