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2dconv-fpga

A 2D convolution hardware implementation written in Verilog

accdnn

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

accelerating-cnn-with-fpga

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

alexnet-fpga-implementation

This repository contains all the parameters you need to synthesize the AlexNet by using Vivado High Level Synthesis.

algorithm_interview_notes-chinese

2018/2019/校招/春招/秋招/算法/机器学习(Machine Learning)/深度学习(Deep Learning)/自然语言处理(NLP)/C/C++/Python/面试笔记

algorithms_and_data_structures

180+ Algorithm & Data Structure Problems using C++

awesome-algorithm

刷题训练指南

binarybrain

Binary Neural Network for FPGA (LUT-Network)

blueoil

Bring Deep Learning to small devices

bnn

Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools

bnn-1

HLS code for a BNN accelerator

bnn-fpga-k7

bnn-icestick

Binary Neural Network on IceStick FPGA.

bnn_based_on_fpga

Accelerator for BNNs, using Opencl based on FPGA

bnn_deployment

Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing

bnnonfpga

tiny-dnnを用いてFPGA上にBNNを実装する記録

brain

This repo contains Go implementation and corresponding APIs for acceleration of Binarized Neural Network (BNN) on FPGAs.

caffe

Caffe for Sparse and Low-rank Deep Neural Networks

caffe-fpga-opencl

cmake

cnn-acceleration

Implementing CNN code in CUDA and OpenCL to evaluate its performance on NVIDIA GPUs, AMD GPUs, and an FPGA platform.

cnn-fpga

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

cnn-fpga-rtl

The CNN architecture elements implemented with RTL approach in VHDL.

cnn-on-fpga

detailed description in "report.pdf"

cnn_accelelator

采用全并行策略加速CNN的一个框架

cnn_for_slr

A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.

cnn_fpga

verilog CNN generator for FPGA

cnn_fpga_zynq_pynq

hls code zynq 7020 pynq z2 CNN

cnn_hardware_acclerator_for_fpga

This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs

cnn_hw_accelerator

FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ