llnl / msr-genie Goto Github PK

https://dl.acm.org/doi/abs/10.1145/3624062.3624146

My preliminary list:

Changes based on the Dec2023 edition of volume 4

Adds support for 06_AAH, 06_B7H, 06_BAH, 06_CFH.
Updates data for 06_6CH, 06_8EH, 06_8FH, 06_97H.
Adds tables 2-53, 2-54, 2-55.

2-20 -> 06_8FH 06_AAH 06_B7H 06_BAH 06_CFH
2-21 -> 06_8FH 06_AAH 06_B7H 06_BAH 06_CFH
2-25 -> 06_8FH 06_AAH 06_B7H 06_BAH 06_CFH
2-29 -> 06_8FH 06_AAH 06_B7H 06_BAH 06_CFH
2-35 -> 06_8FH 06_AAH 06_B7H 06_BAH 06_CFH
2-39 -> 06_8FH 06_AAH 06_B7H 06_BAH 06_CFH
2-41 -> 06_8EH
2-44 -> 06_B7H 06_BAH
2-45 -> 06_B7H 06_BAH
2-46 -> 06_B7H 06_BAH
2-49 -> 06_B7H 06_BAH
2-51 -> 06_6CH
2-52 -> 06_CFH
2-53 -> 06_AAH
2-54 -> 06_AAH
2-55 -> 06_AAH

06_6CH -> 2-51
06_8EH -> 2-41
06_8FH -> 2-20 2-21 2-25 2-29 2-35 2-39
06_AAH -> 2-20 2-21 2-25 2-29 2-35 2-39 2-53 2-54 2-55
06_B7H -> 2-20 2-21 2-25 2-29 2-35 2-39 2-44 2-45 2-46 2-49
06_BAH -> 2-20 2-21 2-25 2-29 2-35 2-39 2-44 2-45 2-46 2-49
06_CFH -> 2-20 2-21 2-25 2-29 2-35 2-39 2-52

"MSRs at the following addresses are not supported in the 12th generation Intel Core processor E-core: 3F7H. MSRs at the following addresses are not supported in the 12th generation Intel Core processor E-core or P-core: 652H, 653H, 655H, 656H, DB0H, DB1H, DB2H, and D90H." (p. 2-331 v4)

"MSRs at the following addresses are not supported in the 12th and 13th generation Intel Core processor E-core: 30CH, 329H, 541H, and 657H. The MSR at address 657H is not supported in the 12th and 13th generation Intel Core processor P-core." (p 2-369)

"The MSRs listed in Table 2-47 are unique to the 12th and 13th generation Intel Core processor P-core. These MSRs are not supported on the processor E-core." (p 2-373)

"The MSRs listed in Table 2-48 are unique to the 12th and 13th generation Intel Core processor E-core. These MSRs are not supported on the processor P-core." (p 2-375)

"The MSRs listed in Table 2-54 are unique to the Intel Core Ultra 7 processor P-core. These MSRs are not supported on the processor E-core." (p 2-430)

"The MSRs listed in Table 2-48 are unique to the Intel Core Ultra 7 processor E-core. These MSRs are not supported on the processor P-core." (p 2-431)

I suspect we'll eventually need per-core-type msr-safe allowlists.

The manual approach to generating cross-references survives in util/mapping.h.

std::vector<std::string> df_dm is a list of df_dms with their associated tables.

std::vector<std::string> tables is a list of tables with their associated df_dms.

Trying to update both when a new version of the Intel manual drops is proving to be excessively error-prone. Use one to generate the other. (The former is easier to read on the screen, the latter might be easier to update as new architectures are added.)