I'm trying to synthetize, implement and generate the bitstream for the NexysVideo board.
Then I did the same using the tcl script and the Makefile, everything worked fine and all the tests have passed. I found out that the only differences betweeen the two project created are the options in the BlockRAM that the user guide says to set as:
Generate address interface with 32 bits : yes
Common Clock : no
Generate address interface with 32 bits : no
Common Clock : yes
In deed if I change the options as the latter the TB passes. Is there a problem with the TB or the configuration specified in the user guide is wrong ?
The image below shows the errors I obtain when executing the TB using 32 bit address interface and no common clock.
![vivado-error](https://user-images.githubusercontent.com/59122272/223432072-c44e50d9-247e-4153-aaff-149127dda6c0.png)