infini8-13 Goto Github PK

21daysofrtl

accelerating_standard_and_modified_aes128

aes-128-tlverilog

Implementation of AES-128 bit key algorithm in TL-Verilog

benchmarks

EPFL logic synthesis benchmarks

chisel-bootcamp

Generator Bootcamp Material: Learn Chisel the Right Way

chisel-tryout

cocotb-verif

Trying out cocotb - Tuts and Example

convolutional_autoencoder

Autoencoder constructed with CNN in Keras for Image Denoising

cops_algorithms

Repository for algorithms contributed in CSOC

cops_namecards

COPS Repository for Contributors Namecards

courseraforums

[Implementation Updated] Anonymized versions of the discussion threads from the forums of 60 Coursera MOOCs

cs537-network-security

csrankings

A web app for ranking computer science departments according to their research output in selective venues, and for finding active faculty across a wide range of areas.

des-aes-128bit-verilog

doc_scanner

dog_vs_cat-cnn

A simple CNN for classifying dogs and cats with a small dataset, accompanied by data augmentation and VGG-16

dsa

Essentials of Data Structures and Algorithms

dsa-essentials-course

Data Structures and Algorithms Essentials Course Repository

ecpv-conv-design

Converter Design for Electrolytic capacitor-less Two Stage PV System - Undergraduate Research Project @ VLPERI, IIT(BHU)

edxbuildingariscvcpucore

edX LinuxFoundationX LFD111x Building a RISC-V CPU Core

efpga---rtl-to-gds-with-sky130

This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk

enter-the-world-of-web-dev

My learning progress, visualised with projects I've made while learning

fastled

The main FastLED library (successor to FastSPI_LED). Please direct questions/requests for advice to the g+ community - http://fastled.io/+ - we'd like to keep issues to just tracking bugs/enhancements/tasks. *NOTE* library work is currently on hold - see https://plus.google.com/102282558639672545743/posts/JQKcujjaXXC for details.

fpga_workshop_collaterals

Input files and commands needed for the workshop, sorted daywise

fusesoc

Package manager and build abstraction tool for FPGA/ASIC development

hacker-introduction

hdlbits-verilog-funda

hls

infini8-13

infini8-13.github.io