forconesi / nfmac10g Goto Github PK

Please check the following error message.
pcap2axis.c:31:18: fatal error: pcap.h: No such file or directory

Thank.

Jinsan Ko

Data from XGMII RX should be sampled on both the rising and the falling edge of the RX clock. Does this mean that nfmac10g reaches only half of 10Gbps since the receive logic only runs on the posedge of the RX clock?

Hi,
For one of my project in system on chip, I am working on integrating an ethernet module in the riscv based system on chip.
Now, my question is, will this nfmac10g work properly as a memory mapped slave with the AXI4 system bus of the SoC?
I did not find any control registers for configuring the ethernet in the documentation.
It would be great if @forconesi can give any advice on this.
Thank you