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100g-fpga-network-stack-core

This repo contains the Limago code

accelerating-cnn-with-fpga

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

aladdin

A pre-RTL, power-performance model for fixed-function accelerators

asap

gem5 simulator to evaluate the design idea proposed in ASAP: A Speculative Approach to Persistence

awesome

:sunglasses: Curated list of awesome lists

awesome-action-recognition

A curated list of action recognition and related area resources

awesome-public-datasets

A topic-centric list of high-quality open datasets in public domains. Propose NEW data ☛☛☛PR☛☛☛

awesome-resume-for-chinese

:page_facing_up:适合中文的简历模板收集（LaTeX，HTML/JS and so on）由 @hoochanlon 维护

awesomo

An extensive list of interesting open source projects written in С, C++, Clojure, Lisp, Elixir, Erlang, Elm, Golang, Haskell, JavaScript, Lua, OCaml, Python, R, Ruby, Rust, Scala etc.

axi-ddr3

学习AXI接口，以及xilinx DDR3 IP使用

basic_verilog

Must-have verilog systemverilog modules

benchmarks

biriscv

32-bit Superscalar RISC-V CPU

blog

blog entries

c-thread-pool

A minimal but powerful thread pool in ANSI C

caribou

Caribou: Distributed Smart Storage built with FPGAs

computer-science

:mortar_board: Path to a free self-taught education in Computer Science!

conv-hls-overclocking

convnet-burden

Memory consumption and FLOP count estimates for convnets

cores

Various HDL (Verilog) IP Cores

corundum

Open source, high performance, FPGA-based NIC

crc32c

CRC32C implementation with support for CPU-specific acceleration instructions

custom_part_data_files

Xilinx PCIe to MIG DDR4 example designs and custom part data files

dac-2024-phd

davos

Distributed Accelerator OS

deep-learning-wizard

Open source guides/codes for mastering deep learning to deploying deep learning in production in PyTorch, Python, C++ and more.

deepmatch

DeepMatch: Practical Deep Packet Inspection in the Data Plane using Network Processors

destiny_3d_cache

Source code for DESTINY, a tool for modeling 2D and 3D caches designed with SRAM, eDRAM, STT-RAM, ReRAM and PCM. This is mirror of following repository:

disaggregation

doppiodb

doppioDB - A hardware accelerated database