chennakeshavadasa / miller-compensated-two-stage-opamp-using-sky130pdk

Design of miller compensated 2 stage opamp using open source SKY130PDK

Miller Compensated two stage OPAMP using SKY130 PDK

Design of miller compensated 2 stage opamp using open source SKY130PDK

Specification

• DC Gain: 60dB
• GBW(Gain Bandwidth): 5MHz
• PDK: SKY130PDK
• Phase Margin(PM): >=60°
• Slew Rate: 10V/sec
• ICMR(+): 1.2V
• ICMR(-): 0.8V
• CL(Load Capacitance): 10pF
• Power Dissipation: <=80uW(this is bcs of the large load capacitance)
• VDD=1.8V

Circuit Diagram

The circuit of an OPAMP includes a Differential Stage which contains a differential pair and current mirror. It also includes an Amplification stage to increase the gain.

Design and Analysis

• You can check out the Design and Analysis of the OPAMP here.
• Design Overview
  • (W/L) ratio of M3,M4 is found using ICMR(+)
    
  • (W/L) ratio of M1,M2 is found using GBW
    
  • I5 is found using Slew Rate
    
  • (W/L) ratio of M5 is found using ICMR(-)
    
  • (W/L) ratio of M6 is found from Gain and design of M3, M4
    

Schematic

Gain and Phase Margin

• Achieved specifications:
  • DC gain: 60 dB, GBW(new): 10 MHz, Phase Margin(new): 80°, Power Dissipation : 41μW (because of the large CL), Slew Rate: 9.06V/sec, CMRR: 71dB

Implementation

Implementation

Layout

• I have to start.

References

• I've referred Analog IC Design Playlist by Prof. Nagendra Krishnapura of IIT Madras
• Playlist: https://youtube.com/playlist?list=PLbMVogVj5nJRlMz5diOg9wBizaU6-egJc&si=f0DuX2HR8V7EEkBH