arjunrajasekharan / 16-bit-dadda-multiplier Goto Github PK
View Code? Open in Web Editor NEW16-bit DADDA Multiplier design using using 5:2 compressor as the major reduction compressor and 4:2 compressor; and FullAdder and HalfAdder to simulate 3:2 and 2:2 compressors respectively.
License: MIT License