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This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is coded by me(Xianghzi Meng)

License: MIT License

Verilog 16.28% Tcl 23.16% Forth 0.77% Makefile 3.01% SystemVerilog 56.78%

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