zivfung / zedboard_cnn Goto Github PK
View Code? Open in Web Editor NEWVivado project of hardware Implementation of CNN on Xilinx Zedboard.
Vivado project of hardware Implementation of CNN on Xilinx Zedboard.
请问一下,这个是不是接7晶管的port呢 ?
set_property -dict {PACKAGE_PIN R6 IOSTANDARD LVCMOS33} [get_ports {seg[0]}]
set_property -dict {PACKAGE_PIN T6 IOSTANDARD LVCMOS33} [get_ports {seg[1]}]
set_property -dict {PACKAGE_PIN AB7 IOSTANDARD LVCMOS33} [get_ports {seg[2]}]
set_property -dict {PACKAGE_PIN AB6 IOSTANDARD LVCMOS33} [get_ports {seg[3]}]
set_property -dict {PACKAGE_PIN Y4 IOSTANDARD LVCMOS33} [get_ports {seg[4]}]
set_property -dict {PACKAGE_PIN U4 IOSTANDARD LVCMOS33} [get_ports {seg[5]}]
set_property -dict {PACKAGE_PIN T4 IOSTANDARD LVCMOS33} [get_ports {seg[6]}]
set_property -dict {PACKAGE_PIN AA4 IOSTANDARD LVCMOS33} [get_ports {seg[7]}]
[Chipscope 16-213] The debug port 'dbg_hub/clk' has 1 unconnected channels (bits). This will cause errors during implementation.
请问如何解决这个 错误??
我想问下 ,我能自己训练模型放在这个项目吗?你是如如让他识别号码的?
谢谢大大你每次的帮忙。从1月开始,没次遇到难题都询问你,你都很有耐心的帮我解答。我其实是FPGA新人,至今使用FPGA不到6个月,就有极大的挑战要我实现CNN实时侦测的在FPGA上。我依然还是很懵懂,不是说什么程序高手。但是我是很有心想学习FPGA的。你的帮助激起了让我想继续学FPGA的冲动。虽然你说过这个并不是什么大型project,但是对我而言,我从中学到了很多。在我实现这代码的过程中,我透过这些代码吸取到大大制作的经验以及流程,让我明白在FPGA要实现CNN的概念以及步骤,这真是很好的实战体验。感恩有你~
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