yybbhh / macsim_bip

BIP cache protocol modificaitons to macsim

macsim_bip

BIP cache protocol modificaitons to macsim

This is based entirely on the original macsim simulator with a few modifications to run a new cache-insertion policy, TAP_BIP.

The original macsim v2.0 source was downloaded from https://code.google.com/p/macsim/downloads/list

This is based on some of the work done by Lee, et al in J. Lee and H. Kim, "TAP: A TLP-aware cache management policy for a CPU-GPU heterogeneous architecture," HPCA: IEEE 18th International Symposium High Performance COmputer Architecture, February 2012.

Additional references:

[1] J. Lee and H. Kim, "TAP: A TLP-aware cache management policy for a CPU-GPU heterogeneous architecture," HPCA: IEEE 18th International Symposium High Performance COmputer Architecture, February 2012.

[2] V. Mekkat, A. Holey, P.-C. Yew and A. Zhai, "Managing Shared Last-level Cache," International Conference on Parallel Architectures and, 2013.

[3] M. K. Qureshi, A. Jaleel, Y. N. Patt, S. C. Steely and J. Emer, "Adaptive Insertion Policies for High Performance Caching," The 34th International Symposium on Computer Architecture, 2007.

[4] D. Zhan, H. Jiang and S. C. Seth, "CLU: Co-optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches," IEEE Transactions on Computers, 07 December 2012.

[5] D. Zhan, H. Jiang and S. C. Seth, "Locality & Utility Co-optimization for Practical Capacity Management of Shared Last Level Caches," International Conference on Supercomputing, 28 June 2012.

[6] "MacSim," [Online]. Available: http://code.google.com/p/macsim/.