wwagner33 / adpll-vhdl Goto Github PK
View Code? Open in Web Editor NEWAll-Digital Phase-Locked Loops (ADPLL) code in High Speed Integrated Circuit Hardware Description Language (VHDL) for a Field Programmable Gate Array (FPGA). The code is for the Intel/Altera Cyclone V FPGA.
License: GNU General Public License v3.0