Name: Professur für VLSI-Entwurfssysteme, Diagnostik und Architektur
Type: Organization
Bio: Chair for VLSI Design, Diagnostics and Architecture - Faculty of Computer Science at Technische Universität Dresden, Germany
Location: Nöthnitzer Straße 46, 01187 Dresden, Germany
Blog: http://vlsi-eda.inf.tu-dresden.de
Professur für VLSI-Entwurfssysteme, Diagnostik und Architektur's Projects
Coroutine Co-simulation Test Bench
Open Source VHDL Verification Methodology (OSVVM) Repository
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
This repository contains synthesizable examples which use the PoC-Library.
A Python-based IP Core Management Infrastructure.
Reconfigurable Common Computing Framework (RC2F)
Reconfigurable Common Cloud Computing Environment (RC3E)
Client software for RC3E.
A django-based web application for managing your rc3e installation
The RC3E Node.
The RC3E Server (resource manager).
Sphinx theme for readthedocs.org
Open Source VHDL Verification Component Framework for making structured VHDL testbenches for verification of FPGA and ASIC.
VUnit is a unit testing framework for VHDL