six5536 / circle Goto Github PK

Add a compile flag:
SCHEDULER_IN_FIQ

To allow calling CScheduler functions in an FIQ handler.

For example:
CSemaphore::TryDown();
CSynchronizationEvent::Set();

This will work by setting FIQ_LEVEL for the scheduler m_SpinLock

Add support to the SMI implementation for:

• SMI interrupt: for handling SMI transfer completion using an interrupt
• SEO/SW & SWE/SRW signals: for clocking external devices
• external DREQ trigger: for triggering transfers via an external hardware signal
• configuration of data packing, etc.

Add a compile flag:
TIMER_IN_FIQ

To allow calling CTimer functions in an FIQ handler.

For example:
CTimer::Get()->GetClockTicks()

This will work by setting FIQ_LEVEL for the timer m_SpinLock

See:
https://github.com/toptensoftware/flashy

Using "Flashy" v2

There is a new improved version of Flashy, which is maintained in a separate
project:

https://github.com/toptensoftware/flashy

Details about the features of this version and its installation can be found in
the project README. The configuration in Circle to use this version is very
similar as described above, with one difference. In your Config.mk you have to
specify:

USEFLASHY = 2

Currently FIQ can be used for the GPIO interrupt, but just a single interrupt which does not consider the GPIO line causing the interrupt.

Although FIQ should be fast, there are occasions where it can be useful to use it for the GPIO interrupts.

This can be implemented simply with a bUseFIQ flag to the CGPIOManager() which connects the FIQ interrupt to the GPIO manager rather than the IRQ interrupt.

Extend httpdaemon to support transparent content so that (for instance) JSON can be handled by a web worker

Enhance DMA control block support

• custom control block configuration: finer grained control of DMA behaviour, and possibility of ...
• DMA chaining: allow one DMA transfer to trigger a subsequent transfer.

DMA chaining opens up possibilities such as using the SMI for waveform generation, or implementing continuous DMA reads from a peripheral, or simply hardware control of 2 or more different DMA transfers.