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View Code? Open in Web Editor NEWEDA physical synthesis optimization kit
Home Page: https://woset-workshop.github.io/PDFs/2020/a09.pdf
License: BSD 3-Clause "New" or "Revised" License
EDA physical synthesis optimization kit
Home Page: https://woset-workshop.github.io/PDFs/2020/a09.pdf
License: BSD 3-Clause "New" or "Revised" License
Thank you for adding the recent timing driven optimization flow! The flow looks very promising and thus I am planning to use this flow for my research. In my scenario I want to optimize (timing-driven) a purely combinational design under various input arrival times and output required times.
Is there a way to specify such constraints? Apologies if it is more of an OpenSTA question. I see that the examples are all sequential designs that optimize based on a clock period target.
I was also wondering how I should fit this in an overall placement flow because 1) the design should be floorplanned and placed before OpenPhySyn 2) OpenPhySyn will resize cell and add buffers which may not fit in the original floorplan. Should I run multiple iterations of 1) and 2) until convergence?
Hello,
I was trying out buffer_fanout. After executing it using optimize_fanout -buffer_cell <cell> -max_fanout <fanout>
. It outputs [2019-12-16 08:44:26.345] [info] High fanout nets [4390]:
, followed by a crash (segmentation violation). This is the sequence of commands that I used:
import_lef
import_def
import_lib
link_design
set_wire_rc
optimize_fanout
Is there anything missing?
Hello,
I am running Ubuntu 18.04, cmake version 3.16.1, ld 2.30, gcc 7.4.0. I am using the libboost-log-dev package. I am building using...
mkdir build && cd build
cmake .. -DCMAKE_BUILD_TYPE=release
make
The problem is at the end when linking object files with boost libraries...
[ 98%] Linking CXX shared library ../../../transforms/libhello_transform.so
/usr/bin/ld: /usr/lib/x86_64-linux-gnu/libboost_program_options.a(cmdline.o): relocation R_X86_64_PC32 against symbol `_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEaSERKS7_' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: final link failed: Bad value
collect2: error: ld returned 1 exit status
external/StandardTransforms/HelloTransform/CMakeFiles/hello_transform.dir/build.make:115: recipe for target 'transforms/libhello_transform.so' failed
make[2]: *** [transforms/libhello_transform.so] Error 1
CMakeFiles/Makefile2:2084: recipe for target 'external/StandardTransforms/HelloTransform/CMakeFiles/hello_transform.dir/all' failed
make[1]: *** [external/StandardTransforms/HelloTransform/CMakeFiles/hello_transform.dir/all] Error 2
make[1]: *** Waiting for unfinished jobs....
[ 99%] Linking CXX shared library ../../../transforms/libbuffer_fanout.so
/usr/bin/ld: /usr/lib/x86_64-linux-gnu/libboost_program_options.a(cmdline.o): relocation R_X86_64_PC32 against symbol `_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEaSERKS7_' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: final link failed: Bad value
collect2: error: ld returned 1 exit status
external/StandardTransforms/BufferFanoutTransform/CMakeFiles/buffer_fanout.dir/build.make:115: recipe for target 'transforms/libbuffer_fanout.so' failed
make[2]: *** [transforms/libbuffer_fanout.so] Error 1
CMakeFiles/Makefile2:2123: recipe for target 'external/StandardTransforms/BufferFanoutTransform/CMakeFiles/buffer_fanout.dir/all' failed
make[1]: *** [external/StandardTransforms/BufferFanoutTransform/CMakeFiles/buffer_fanout.dir/all] Error 2
[ 99%] Linking CXX shared library ../../../transforms/libgate_clone.so
/usr/bin/ld: /usr/lib/x86_64-linux-gnu/libboost_program_options.a(cmdline.o): relocation R_X86_64_PC32 against symbol `_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEaSERKS7_' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: final link failed: Bad value
collect2: error: ld returned 1 exit status
external/StandardTransforms/GateCloningTransform/CMakeFiles/gate_clone.dir/build.make:115: recipe for target 'transforms/libgate_clone.so' failed
make[2]: *** [transforms/libgate_clone.so] Error 1
CMakeFiles/Makefile2:2162: recipe for target 'external/StandardTransforms/GateCloningTransform/CMakeFiles/gate_clone.dir/all' failed
make[1]: *** [external/StandardTransforms/GateCloningTransform/CMakeFiles/gate_clone.dir/all] Error 2
I have a pre-routed design which has a dummy inverter/buffer cells already placed. I want to optimize the sizing of these gates based to get the lowest latency possible. Does that look like the correct use of the OpenPhySym tool?
I managed to get the tool running using docker and tried buffer_fanout_transformation.
I was wondering how to provide the parasitic information to the tool to get or does it calculated based on the tech.lef + def file provided?
Sincerely ask why importing LEF in PhySyn would cause segmentation fault:
The commonds I cause this problem are like:
./Psn
import_lib /home/OpenROAD-flow-scripts/flow/platforms/asap7/lib/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib
import_lef /home/OpenROAD-flow-scripts/flow/platforms/asap7/lef/asap7_tech_1x_201209.lef
Then it would cause segmantation fault.
The LEF file can be easily found in OPENROAD platform asap7 at /OpenROAD-flow-scripts/flow/platforms/asap7/lef/asap7_tech_1x_201209.lef (I guess it's used to define layers).
The screenshot is attached as follows. Looking forward to your reply.
Hello,
I would like to report a small issue or inconvenience. I got this error after running the binary Psn
.
[error] Flute initialization failed
I think that's due to initializeFlute
search for luts in ../external/flute/etc
. https://github.com/The-OpenROAD-Project/OpenPhySyn/blob/b6267b7fda0e1772e738ae17c250d4e0fc2e3fc4/src/Psn/Psn.cpp#L92
Perhaps it can search the current working directory as well.
Hi, I just tried the default "ibex_gp.def" file with clock period to be 2.1ns, the tool will size the gates and everything works fine. But if I set all initial gate sizes to be X1 in "ibex_gp.def" file, the result showed that the tool did not upsize or downsize any gate. Could you kindly show me the reason why setting all initial gate sizes to be "X1" will disable the tool to do resizing?
Due to the age of the OpenDB and OpenSTA module refs, this fails to build with cmake>=3.17.
My cmake .. step is failing during installation. I have SWIG 4.0.2 installed but it seems like looking for 3.0.
I also have openroad installed which uses SWIG 4.0.2. For this reason I don't want to downgrade SWIG to 3.0. Is there a way to bypass this issue?
-- Found BISON: /usr/bin/bison (found version "3.8.2")
CMake Error at /usr/share/cmake-3.22/Modules/FindPackageHandleStandardArgs.cmake:230 (message):
Could NOT find SWIG (missing: 3.0) (found version "4.0.2")
Call Stack (most recent call first):
/usr/share/cmake-3.22/Modules/FindPackageHandleStandardArgs.cmake:594 (_FPHSA_FAILURE_MESSAGE)
/usr/share/cmake-3.22/Modules/FindSWIG.cmake:153 (find_package_handle_standard_args)
external/OpenDB/CMakeLists.txt:42 (find_package)
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