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Hardware design files for the Spark Core, a tiny Wi-Fi development kit.

Home Page: https://www.spark.io/

License: Creative Commons Attribution Share Alike 4.0 International

Eagle 99.75% Prolog 0.25%

core's Introduction

The Spark Core

These are the hardware design files for the Spark Core, developed by Hex Labs, Inc. dba Spark.

These files have been made available online through a Creative Commons Attribution-ShareAlike 3.0 license.

You are welcome to distribute, remix, and use these files for commercial purposes. If you do so, please attribute the original design to Spark both on the website and on the physical packaging of the product or in the instruction manual. All derivative works must be published under the same or a similar license.

The Story

Development of the Spark Core in its current form began in January 2013 in Shenzhen, China during Spark's participation in the HAXLR8R hardware accelerator. Development of the Spark Cloud was started in December 2011 as software infrastructure to support the Spark Socket. Between January and May of 2013, the Spark Core and Cloud were developed from prototypes to a functional platform for building internet-connected hardware. On May 2, 2013, the Spark Core was launched on the crowdfunding platform Kickstarter. On May 17, 2013, the hardware design files for the product were released here on GitHub for others to use and learn from.

What's Included

BOM — Current bill of materials for the latestversion of the Spark Core. Includes part number labels from design files, component values, quantities, and package types.

Datasheets — Datasheets for the various components included on the Spark Core, including the STM32F103CBT6 microcontroller and the CC3000 Wi-Fi module.

EAGLE — Schematic and board files for the Spark Core. We use EAGLE, a freemium PCB design software package, for the design and development of the Spark Core.

Gerber — Complete set of Gerber files for the current version of the Core. Use these files to spin up and assemble your own Cores!

Libraries — EAGLE libraries for the components used on the Spark Core.

PDFs — Includes detailed description of component placement on the Core (especially useful during assembly). Also includes mechanical drawings and a detailed schematic of the Core for reference and debugging.

Pin Mapping — Detailed pin mapping of the Spark Core and STM32, providing information about which pins are mapped to which peripherals.

core's People

Contributors

andyw-lala avatar mohitbhoite avatar monkbroc avatar satishgn avatar towynlin avatar zsup avatar

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core's Issues

Relabel BTN to MODE

We should start labeling BTN as MODE and referring to it that way, because its general purpose is to switch the mode of the Core.

Add Spark logo and version number

Since we've got a tiny bit of space now (on the bottom of the board, opposite the RF circuit), let's add our logo and the version number of the board there. I'll produce the image.

Remove pull-up resistor on MEM_CS?

Because the STM32 has internal pull-up resistors, is it possible to remove the pull-up resistor on MEM_CS? If there's good reason to leave it, we should do so, but if it's not necessary it may be worth removing to free up a small bit of real estate.

Switch to smaller external spi module

@satishgn says:

Also replace the current SPI flash with a smaller form factor chip. You can
consider this digkey part no.:
M25P64-VME6TGhttp://www.digikey.com/product-detail/en/M25P64-VME6TG/M25P64-VME6TGTR-ND/1663639from
Micron technology though the pricing is more than the SST ones which
we are using now. Else opt for the cheaper
SST25VF040B-80-4I-QAEhttp://www.digikey.com/product-detail/en/SST25VF040B-80-4I-QAE/SST25VF040B-80-4I-QAE-ND/2299379

Reduce size of 8Mhz crystal

We're looking to save some space on the Core, so let's find a 8Mhz crystal with a smaller footprint than the one we're currently using.

Eliminate solder seeping through board

photo 149

We should ensure that solder doesn't seep through the board between the USB connector and the LDO. Likely solution is to simply remove the vias entirely, as the USB through-hole pins should provide the necessary heatsinking.

USB Connector Hole Size

The slots for the USB connector may be slightly too small, and may cause a problem with the pin connections on the top side of the PCB on some Cores. AQS gave the feedback that some connectors require mechanical force to secure during assembly, and that it may cause issues with USB power to the MCU.

Use through-hole USB micro connector

Suggestion from Bunnie: replace the USB micro connector with the through-hole version (which is really sort of a hybrid through-hole/SMT) to improve the mechanical stability, so no one rips it off by accident (which I have done many times to my poor little Arduino Pro Micros)

Remove power LED

I'm going to remove the "power" LED because, for folks who want to use the Core in very low power applications, the constant power draw of the LED might be a fatal flaw.

Fix RGB LED footprint

As long as we're tweaking things, let's go ahead and fix the RGB LED footprint so that it's oriented correctly. Also, @satishgn, rather than marking the origin corner with a "1", can we mark it with a triangular shape like is on the tDoc layer (and the top of the LED)?

Latest micro-USB footprint

@mohitbhoite or @brandoaire,

the newer cores are using the micro-USB with oval through hole for more mechanical strength. However, i couldn't locate the correct footprint in the Spark EAGLE library.

Looking at the most recent Photon schematics, it seems to still be using the "USB-MICROB-SLOT-HOLE" that doesn't match up with the current newer core usb.

Any ideas?

Solder Pads on Antenna

Need to double check the size of the solder pads for the antenna. Based on most recent build, the component was difficult to place accurately, especially if solder paste was not completely or precisely covering the pad. See attached picture (best I can do with an iPhone). It seems to sit on the inner 25-50% of the pad on each side.

img_0098

Confirm all footprints with datasheets

Now that we're finalizing the board, we should get the specific datasheet for every component that we're using and double-check that all of our footprints are in line with the components that the manufacturer spec'ed out, in particular all of the components that don't use standard footprints.

@brandoaire, please collect all the datasheets and put them in the 'Datasheets' folder.

Add RTC crystal

Add RTC crystal so that people can use the Core for real-time applications.

Route traces under Wi-Fi module on third layer

The datasheet for the CC3000 suggests extending the ground plane across the entire CC3000, and routing all traces on the third layer (the power plane). While our real estate constraints make it impossible to follow this to the letter, we should attempt to remove traces from the top layer under the CC3000 as much as possible.

Shift vias away from CC3000 pads

Advice from Bunnie: we should try and keep vias away from pads (to prevent solder splattering into them and creating shorts)

This of course conflicts with our effort to have GND vias near the GND pins, but perhaps there may be opportunities for small fixes here? @satishgn, what do you think?

Make uFL footprint smaller

From @andyw-lala

Check out the attached image.

I've always been a little unhappy about the size of the ground pads on the u.FL footprint, I think if you can remove 8-10 mil off the highlighted edge of the ground pad (you can actually do it to both ground pads), without moving the center of the part, it will improve the clearance between the 50Ohm trace and ground.
This makes the line less lossy.

100_1624

Add GND vias near the CC3000 GND pads

The CC3000 datasheet recommends 2 GND vias for each GND pad on the CC3000. While this may not be possible to follow to the letter, let's attempt to add as many vias as we can fit within our real estate constraints.

Power regulator optimization

Take another look at the power regulator circuit in detail to see if there may be opportunities to improve power performance within the space constraints.

Panelization

Should figure out our layout for panelization; may want to work with the manufacturer on this. @andyw-lala's advice:

I would suggest starting with a 2x5 or 2x6 layout with the USB connectors pointing outwards. Discuss with both the board and assembly house the right mix of routed outline and break-off tabs to maintain rigidity during assembly, allow for reasonable singulation force, minimum cost and max yield all around.

Re-introduce PTC

Turns out that, by eliminating the PTC, we introduce an opportunity for a blown diode when RAW is accidentally grounded (easy to do since they're right next to each other).

@satishgn, please see if you can find a place to add the PTC back into the design (starting from the 'dev' branch).

Remove R9

Since we're trying to save space, let's remove R9, which we haven't been stuffing for quite some time.

Reduce outgassing

Suggestion from Bunnie: we should work with the manufacturer to determine where we might run into outgassing issues and resolve any potential problems.

Not sure if there's anything to do here, but @brandoaire we should just raise it with the manufacturer and see if they have any thoughts.

Fix silkscreen for RGB LED

The silkscreen for the current RGB LED is turned around; we need to adjust it and replace the "1" marketing with a clearer indication (the triangle shape from the top of the LED would be good

Reduce number of capacitor values

Looking at the new BoM, would be great if we could reduce the number of capacitor values we have in the design. Two questions (numbers refer to the 'satish' branch):

  1. Could we make C2 4.7uF as well?
  2. Could we make C5 either 12.5pF or 22pF? @andyw-lala, any RF implications there?

what's the purpose of tri-state buffer on wifi module SPI_DOUT

Hello spark team,

I have a question (not an issue) , what is the purpose of inserting a tristate buffer between wifi module pin 13 (SPI_DOUT) and STM32 host PB14 (pin 27, SPI_MISO)

it seems to me that both use 3.3V I/O's, and PB14 is dedicated to wifi and not shared with the external world

thanks
Sherif

Use SMD male header pins (example digikey part no: A106611TR-ND)

How about replacing the throughhole male header pins with the SMD ones. That will free one side of the board and since there are 2 rows that should give us good space. Example digikey part no.: A106611TR-ND
SMD part will also benefit in assembly as all the parts can now be accomodated in Reflow soldering.

Replace button with less expensive proxy

One of our potential manufacturers spec'ed out the Haoyu TS-1185A-E as an alternative button to the more expensive G&K one we're using now. Looks roughly compatible, but we should tweak the footprint. @satishgn, I'm putting the datasheet in the Datasheets folder.

Revert back to 5mm x 3.2mm crystal footprint

Turns out we can't find an 8Mhz crystal at 3.2mm x 2.5mm, so we're going to have to figure out how to squeeze the 5mm x 3.2mm crystal back on there. I think we can shift down the capacitors on the bottom of the board; will be tricky to figure out how to make room, so we should dig into this ASAP to see if it's feasible or if we need to make more significant modifications

Replace voltage regulator with MIC5209-3.3YS

The voltage regulator we designed into the Core v0.2.0 has very long lead-times; we should research alternatives to see if we can find a voltage regulator with a similar footprint that meets our specs but is more readily available.

RF optimization

  • Transmission line for the antenna should be 50Ω impedance.
  • We could use an antenna that the CC3000 is already certified with: ACX AT8010-E2R9HAA

Increase spacing between 0603s

Although we haven't had any manufacturability issues so far, one way to ensure that we won't is by increasing the spacing between our smaller 0603 components. It may not be necessary, but worst case it's a wasted couple hours, and best case it has a noticeable impact on manufacturing yield. So let's do it.

Can we remove the USB disconnect circuit?

Looking into whether the USB disconnect circuit is actually necessary, or whether it can be removed without affecting the functionality of the Core. Considering that the primary uses of the Core will be wireless, it would be great to be able to get rid of these parts to save real estate that can be used for some of the other parts we're trying to add.

Replace one LED with an RGB LED

It's getting complicated to try and present the status of the Core's internet connection on two LEDs, so I'm going to attempt to replace one of the LEDs with an RGB LED that can be used for Core status. The second LED should be user-controlled. The constraint here will be making room for the additional traces necessary for the RGB.

Re-implement WIFI-CS/WIFI-EN fix for buffer

Because git can't really handle EAGLE files, we lost the fix for mapping the buffer to the correct pin on the Wi-Fi module (the v0.2.5 change). Let's re-implement this on the 'rf-match' branch.

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