Comments (2)
Lingrui98
commented on August 21, 2024
这是一个好问题。
这里确实和我们的预期不符，可能会使跨取指packet的RVI指令引起额外的流水线冲刷。简单的改法是做一个bypass，但这样会在if4的预测路径后面加上额外的逻辑，可能导致时序问题。另外，即使做了bypass，一个相应的reg变量还是必要的，它可以处理流水线阻塞时的情况。
你可以尝试修复一下这个问题，欢迎提pull request :)
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daxxyy123
commented on August 21, 2024
好的，明白了。
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