openethercatsociety / soes

Simple Open Source EtherCAT Slave

Simple Open Source EtherCAT Slave

SOES (Simple OpenSource EtherCAT Slave Stack) is an opensource slave stack that is very easy to use and provides a small footprint. It is a good alternative to more complex stacks on the market.

Overview

SOES is an EtherCAT slave stack written in c. Its purpose is to learn and to use. All users are invited to study the source to get an understanding how an EtherCAT slave functions.

Feature list:

• Address offset based HAL for easy ESC read/write access via any interface
• Mailbox with data link layer
• CoE
• Object dictionary
• SDO read and write for all sizes including segmented transfers
• Easy portable C-code suited for embedded applications
• Fixed and/or dynamic PDO mapping
• FoE with bootstrap template
• Support for Little and Big endian targets
• Run polling, mixed polling/interrupt or interrupt
• Support for SM Synchronization
• Support DC sync0 and DC Synchronization
• Add stack configuration via new configuration parameter to/or from "stack"_init
• EoE

TODO

• Update documentation
• Add EoE sample application

soes's Issues

Update ESCvar.time in rt-kernel esc_hw worker loop to detect EEPROM write going idle

Update ESCvar.time in rt-kernel esc_hw worker thread loop.
ESCvar.time is used by emulated eeprom handler to measure idle time, when enough time have elapsed the write is assumed to be completed and the EEPROM RAM buffer is flushed to FLASH.

Currently there are no use-case requiring ESCvar.time in SM2 interrupts, so we move it from SM2 interrupt to low prio interrupt handler.

Writing SDO from slave

Hello,

Is there a process to publish a value to a read-only SDO variables from the slave using SOES?
If I understand correctly, this value will only be read by the master when starting right?
Is it possible to publish values with lower frequency instead of including it in all PDO transaction?

[question] Multiple ECAT Slaves PDO assignments using the SSC Tool

Hello again,

I am trying to create a multi slave system and I am in the process of designing the PDO for each node (inverter system). The SSC Tool in combination with an excel Sheet are being used.

Currently the process is very long and error prune. A seperate excel sheet config must be created for every slave => parsed with the SSC Tool => make some minor code updates => flash the target.

As I am new to this 😞, therefore I presume that there must be an easier way to make this happen. For example write the excel is such way that the PDO are getting automatically incremented or ...?

The setup uses your own SOEM implementation on a Teensy 4.1 board an a ECAT Master and the F2838 TI Board as an ESC.

I would be very glad if you cound point me to a some documentation or make a suggestion on how to make this possible 🥇

Many thanks 😃

soes for ROS2

Dear Reader,

So i want to simulate an ethercat connection between device 1 and a motor_driver by using two computers. Computer 1 will have a SOEM_for_ROS2 library that supposedly can make a master_node.

But is it possible that Computer 2 can connect to Computer 1 with EtherCAT?
If so, do i need a specific library or can i just use SOEM library?
and can I connect to Computer 1, even if Computer 1 is running SOEM like it is in ROS2?

I was thinking of sending a very basic message, so that i can test if it works. But i'm kinda stuck where to go from here.
Could someone give me a general guidance or suggestions?

Thanks for reading my problem.

Kenny

DAve + EtherCAT Sdk XMC4800 code generation failed

Hi

Am just following the instruction as in https://rt-labs.se/content/uploads/EtherCAT_SDK_DAVE.pdf.
But when generating xml or code generation of Slave from EthercatSDK .. Its doesnt produce _Slave.c and _slave.h

and also utype.h is almost empty compared to the one described in
http://download.rt-labs.com/ethercat/sdk/Infineon/dave_xmc48_soes_sample.zip

Build of entrire project fails,
even tried to open the example as it is .. still same issue

Thanks in advance for your help

/Rameshkumar
Got-S

ESC HW Layer improvements for HAL rt-kernel

Change the release/reset order for I/O in esc_hw for rt-kernel, align with bare metal XMC4 and DAVE.

/* Used to perform PHY reset after ECAT module have been released as
* described in 16.3.2.3 final section;
* "In some case PHYs may be released from reset after releasing the ECAT
* module, the pin for nPHY_RESET can be used as an I/O and shell be
* switched later to the alternate output function".
* Works well with relax boards.
*/

PDO mapping overflow

There is a problem with MAX_RXPDO_SIZE & MAX_TXPDO_SIZE control in SOES.

For example you defined in slave:

#define MAX_RXPDO_SIZE   512
#define MAX_TXPDO_SIZE   512

Now you can map 600 bytes of objects to RXPRO and 600 bytes of objects to TXPDO by SOEM (dynamic PDO mapping).

When TXPDO_update() or RXPDO_update() functions are called they have no check of the size of 'rxpdo'/'txpdo' buffers, which cause buffer overflow in code:
ESC_read (ESC_SM2_sma, rxpdo, ESCvar.ESC_SM2_sml);
and
ESC_write (ESC_SM3_sma, txpdo, ESCvar.ESC_SM3_sml);

Solution: check the size of mapped objects in transition PREOP_TO_SAFEOP/SAFEOP_TO_SAFEOP and the slave will not go to SAFEOP state in case of wrong PDO mapping.

    case PREOP_TO_SAFEOP:
    case SAFEOP_TO_SAFEOP:
    {
        ESCvar.ESC_SM2_sml = sizeOfPDO(RX_PDO_OBJIDX, &ESCvar.sm2mappings,
                                       SMmap2, MAX_MAPPINGS_SM2);
        if(ESCvar.sm2mappings < 0 || ESCvar.ESC_SM2_sml > MAX_RXPDO_SIZE)
        {
            an = ESCpreop | ESCerror;
            ESC_ALerror(ALERR_INVALIDOUTPUTSM);
            break;
        }

        ESCvar.ESC_SM3_sml = sizeOfPDO(TX_PDO_OBJIDX, &ESCvar.sm3mappings,
                                       SMmap3, MAX_MAPPINGS_SM3);
        if(ESCvar.sm3mappings < 0 || ESCvar.ESC_SM3_sml > MAX_TXPDO_SIZE)
        {
            an = ESCpreop | ESCerror;
            ESC_ALerror(ALERR_INVALIDINPUTSM);
            break;
        }
    }

Setting for `value` size in `_objd`

I've noticed that the the size of value in _objd has been changed from uint32_t to uint64_t (https://github.com/OpenEtherCATsociety/SOES/blob/master/soes/esc_coe.h#L24).

I find that I seldom (i.e. never) use 64 bit values so this is rather wasteful for object dictionaries with many entries. I don't know what the rationale behind the change was but could we maybe consider adding a #ifdef OD_LARGE_VALUE setting or similar that toggle between 4 and 8 byte values?

slave stack code

I am currently trying to implement a code to allow ethercat communication between a SOEM running on linux and XMC4800 , i don't have the slave stack code tool , Is SOES do the same functionality or i must have the tool to generate the needed files ? as i understand there are 3 layers of stack (Hal / PDI - Generic EtherCAT stack and the application ) , which pare of them is the SOES ?
Thanks

Support for WO SDO objects is missing

The option ATYPE_WO is missing.

SM validation fails for input- or output-only slave

There doesn't seem to be a good way to make SM vaildation in ESC_checkSM23 pass for an input- or output-only slave, i.e. one which has SM2 or SM3 disabled.

Eeprom emulation produces random content

Hello,

I noticed that the eeprom emulation function causes random bytes to be read from the master (Twincat3).
When I upload the EEPROM tipically the first 8/16 bytes are correct, while the remaining is corrupted. - seems that chunks of the EEPROM image are placed at random position.

I tried to comment out the while from the EEP_process and this seems to fix the issue. I was also wondering the reason for that loop.

Thank you in advance.

/** EPP periodic task of ESC side EEPROM emulation.
 *
 */
void EEP_process (void)
{
   eep_stat_t stat;

   /* check for eeprom event */
   if ((ESCvar.ALevent & ESCREG_ALEVENT_EEP) == 0) {
     return;
   }

   // while (1) {
      /* read eeprom status */
      ESC_read (ESCREG_EECONTSTAT, &stat, sizeof (eep_stat_t));
      stat.contstat.reg = etohs(stat.contstat.reg);
      stat.addr = etohl(stat.addr);

      /* check busy flag, exit if job finished */
      if (!stat.contstat.bits.busy) {
    	  return;
      }

Dynamic PDO and objectlist

Hi,

I've been experimenting with the dynamic PDO functionality of SOES.
In the slave_objectlist.c we define the available PDO entries, eg:

const _objd SDO1C12[] = 
{
  {0x00, DTYPE_UNSIGNED8, 8, ATYPE_RWpre, acName1C12_00, 8, &Obj.SM1C12.maxsub},
  {0x01, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_01, 0x1600, &Obj.SM1C12.value[0]},
  {0x02, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_02, 0x1601, &Obj.SM1C12.value[1]},
  {0x03, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_03, 0x0000, &Obj.SM1C12.value[2]},
  {0x04, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_04, 0x0000, &Obj.SM1C12.value[3]},
  {0x05, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_05, 0x0000, &Obj.SM1C12.value[4]},
  {0x06, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_06, 0x0000, &Obj.SM1C12.value[5]},
  {0x07, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_07, 0x0000, &Obj.SM1C12.value[6]},
  {0x08, DTYPE_UNSIGNED16, 16, ATYPE_RWpre, acName1C12_08, 0x0000, &Obj.SM1C12.value[7]},
};

If I wanted to have a huge dynamic PDO, say 256 entries, is it necessary to build a huge const _objd for each entry?
Is it possible to generate this information programmatically, eg through pre_object_download_hook or pre_object_upload_hook?

A second question: Is it possible to to have dynamic PDOs of differing data types, that is assigned by the master?
An example might be: One startup configuration, SOEM requests DTYPE_UNSIGNED32, DTYPE_UNSIGNED8, DTYPE_UNSIGNED16 then on the next startup SOEM might request DTYPE_UNSIGNED8, DTYPE_UNSIGNED8.
I guess I'm asking if the dynamic PDOs must be pre-defined in the objectlist as the same datatypes.
I hope this makes sense!

Thank you.

problem with SDO error code

Hi.
I want my soes can transfer some errorcode to soem, such as code:0x05030000 ("Toggle bit not changed").
And I see code in ecat_slv.c, and I guess I have to set the pointer pre_object_download_hook to a valid pointer. Is this correct? And how can I implement this function?

CTT TF1200 / #42 and #43 fails for input-only slave

The CTT tests-cases TF1200 / #42 and #43 fail for an input-only slave, i.e. a slave with SM2 disabled. The problem seems to be that when going from op to safeop there is no change in wkc, because SM2 was never enabled in the first place. In this scenario, CTT wants us to disable SM3 in safeop.

ESC_ALstatus changes don't trigger post_state_change_hook

It seems like calls to ESC_ALstatus don't trigger state hooks.

For example in the demo application:

      if (watchdog <= 0)
      {
         DPRINT("DIG_process watchdog expired\n");
         ESC_stopoutput();
         /* watchdog, invalid outputs */
         ESC_ALerror (ALERR_WATCHDOG);
         /* goto safe-op with error bit set */
         ESC_ALstatus (ESCsafeop | ESCerror);

This will not trigger the post_state_change_hook which I think it should.

I think it is caused by ESC_state are looking at ALcontrol rather than ALstatus. On the other hand, I'm not really sure of how it should be handled since ESC_state is setting ALstatus if the transition is successful.

Maybe ESC_ALstatus should call hooks as well?

PDO mapping / length changing

Hi there,

I have a PDO configured as an array of 256 bytes. I'd like to use the method reference in SOEM Slaves Configuration #94 by hefloryd to adjust the length of the PDO (up to a max length of 256 bytes).
My understanding is that SOES only supports fixed PDO mappings?

I had a dig around in esc_coe.c in the SDO_download function.
If I modify line 490:

copy2mbx (mbxdata, (objd + nsub)->data, size);

to be:

if ((objd + nsub)->data != NULL) {
 copy2mbx (mbxdata, (objd + nsub)->data, size);
} else {
 copy2mbx (mbxdata,  (uint32_t*)(&(objd + nsub)->value ), size);
}

and change the const SDO objects (ie SDO1601) to not be const, I can adjust the length by rewriting SDO1601 subindex 0 to my desired length.
Running slaveinfo shows that "PDO mapping according to CoE :" changes from the default number of bytes to what I choose it to be.

This is a kludge - but is it a reasonable way of achieving this functionality?
I'm also not certain as to whether simply rewriting the object list like this will actually have any affect on the ethercat device side. Can anyone confirm this?

Thanks very much!

SOES and SOEM test

Hi ,
I have successfully compiled and installed SOES and SOEM in two different system(ubuntu 16).
How to check SOES and SOEM ?

---

Slave side

term@terminal:~/Desktop/SOES-master/build/applications/linux_lan9252demo$ sudo ./demo
Hello Main

Master side

shan@nithi: /SOEM-master/build/test/linux/simple_test$ sudo ./simple_test enp1s0
[sudo] password for shan:
SOEM (Simple Open EtherCAT Master)
Simple test
Starting simple test
ec_init on enp1s0 succeeded.
No slaves found!
End simple test, close socket
End program
shan@nithi:/SOEM-master/build/test/linux/simple_test$

---

please someone suggest me how to test this. both the system i have connected physically over Ethernet.

Output Variables updated in SafeOp State

While in SafeOp state, output variables set by EtherCAT master are still updated by the slave. When slave is in SafeOp state, outputs may not be updated. Nevertheless, SM data must be read in order to reset SM Watchdog.

SDO_findsubindex can be exported

SDO_findsubindex is useful function for a client to find object entries from object dictionary. In last commit it is made static, request to declare in esc_coe.h . Similarly SDO_findobject is another function which is not declared in esc.coe.h

Setting Serial Number

Is there any way to set Serial Number in SDO structure by slave itself during initialization?
I have several devices with same configuration and i have to manually edit objectlist file for each device to set such parameters like serial number and station alias.
It would be nice to get them calculated with reference to MCU unique ID, but i can't get if I can rewrite those parts of SDO manually before initialization.

SOEM slave esc_init error in native linux machines?

HI Everyone

I have a query regarding the process of setting up the slave configuration in my system.

is it necessary to have EtherCAT slave controller to setup the EtherCAT interface or to configure the device as slave using SOES?

I am currently running ubuntu linux on two generic laptops.I am trying to setup the ethercat interface inbetween these two laptops with single ethernet connectivity(one as a master and one as a slave).Will it work?...or does our typical machines have a ESC already inbuild?

Thank You

COE problem when SDO is larger than MBSIZE (fragmented MB)

Hello Sir,
I found an issue when uploading a OD bigger than the MBSIZE, so fragmented upload has to be done.

Debugging the code i found that after sending the first mailbox response with the "incomplete" bit set, the function ESC_mbxprocess() should return 1 as the ESC_coeprocess() need to keep sending the rest of the OD data.

   if (ESC_mbxprocess())
   {
      ESC_coeprocess();
      ESC_foeprocess();
      ESC_xoeprocess();
   }

The solution I found was replace the return 0 to the return 1 in the ESC_mbxprocess()

   /* outmbx read by master */
   if (ESCvar.mbxoutpost && ESCvar.SM[1].IntR)
   {
      ESC_ackmbxread ();
      /* dispose old backup */
      if (ESCvar.mbxbackup)
      {
         MBXcontrol[ESCvar.mbxbackup].state = MBXstate_idle;
      }
      /* if still to do */
      if (MBXcontrol[ESCvar.mbxoutpost].state == MBXstate_again)
      {
         ESC_writembx (ESCvar.mbxoutpost);
      }
      /* create new backup */
      MBXcontrol[ESCvar.mbxoutpost].state = MBXstate_backup;
      ESCvar.mbxbackup = ESCvar.mbxoutpost;
      ESCvar.mbxoutpost = 0;
      //return 0;
      return 1;   //SOLUTION
   }

Regards,
Franco

If spi communication fails, infinite do-while is executed.

Hello.

I have found an unusual situation.
I removed the EtherCAT module (LAN9252) connected by spi while SOES was running on linux.
In this case, hal source continues to do-while.

SOES/soes/hal/linux-lan9252/esc_hw.c

Lines 245 to 248 in 56a4dbf

	do
	{
	value = lan9252_read_32(ESC_PRAM_WR_CMD_REG);
	}while((value & ESC_PRAM_CMD_AVAIL) == 0);

On my board, if ESC is not connected with spi, 0x0 is read.

If the spi communication is unstable during the SOES operation, or if the module is removed, do-while will be executed indefinitely at that part.
So SOES stops at that part.

On the other hand, if there is a CPU that reads 0xffffffff instead of 0x0 when reading with spi, the infinite do-while will be executed in the following part.

SOES/soes/hal/linux-lan9252/esc_hw.c

Lines 234 to 237 in 56a4dbf

	do
	{
	value = lan9252_read_32(ESC_PRAM_WR_CMD_REG);
	}while(value & ESC_PRAM_CMD_BUSY);

I modified the source and bypassed the problem as shown below.
KwonTae-young@d9ea644
In the case that the module is removed from the source, infinite do-while is executed and the SOES does not stop.

What do you think about the issue?
I think that the solution is necessary even if the method is not correct.

I'm sorry I do not have enough English. :)

Thanks!

fifo_cnt variable

Hi everybody,
I don't understand the use of the variable fifo_cnt in the ESC_read_pram and ESC_write_pram functions:
it is loaded, decrement and never used.

According to the LAN9252 datasheet we have to use it to see how many read/write we can perform without needing to check the status again, but this seems not to be the case in the code.

I know that the Microchip LAN9252 SSK code is exactly the same, but this doesn't confort me.

Am I missing something?
Any comment is greatly appreciated.

Marco

FOE Implementation is complicated

Going through the esc_foe files I found out some issues:

• static/private function are missing the static prefix
• in FOE_config requires to pass two references but actually one ref is included to the other
• FOE_error is calling FOE_abort with code 0 that actually is not performing any action other than FOE_init.
• There is no API function for the Application to throw FOE abort codes. For example FOE_ERR_NOTINBOOTSTRAP can only be thrown from the application level

DC in SOES slave stack

I already wrote to rt-labs and they said there won't be any support/info on DC in the slave stack. But I thought writing here to a "wider" audience might help.
I understand that after configuring the DC in the master (PC), it will generate a ARMW signal to the ESC (in my case it's a ET1100 piggyback). This ESC will then generate a SYNC pulse of some length (configured) to my slave board (DSP) through some pin (I am using an interrupt). But what I don't understand is AFTER i get this interrupt, how do I handle the slave stack code? What I think at this moment is to use the interrupt service routine to handle the PDO (input/output data exchange) in the ISR.
What I want to understand is - Is there something more specific while handling DC in the slave stack? Am I missing some information in my steps?
Any help with DC in the slave stack will be appreciated. Or atleast a confirmation that my understanding is correct, is also good.
Kind Regards,
Raghu

SDO abort message is returned with wrong CoE message type

The SDO abort message is returned with wrong CoE message type (should be SDO Res (3)):

Large number of PDO outputs

I'm using a Infineon XMC4300 Relax EtherCAT Kit with SOES. I'm performing different tests using various masters, for one of the test I want to have a large process image. I'm reading a button and have one counter on the slave to update one PDO value, the other PDO's are not used right now.
When I define 696 bits of outputs in the objectfile the master does give the following output:

SOEM (Simple Open EtherCAT Master) Simple test Starting simple test ec_init on enxc025e929272d succeeded. 1 slaves found and configured. Slaves mapped, state to SAFE_OP. segments : 1 : 109 0 0 0 Request operational state for all slaves Calculated workcounter 3 Not all slaves reached operational state. Slave 1 State=0x12 StatusCode=0x001d : Invalid output configuration Request init state for all slaves End simple test, close socket End program

The same for the Acontis Ethercat manter:

003080 : Master state changed from <UNKNOWN> to <INIT> 003109 : Master state changed from <INIT> to <PREOP> 003117 : ERROR: At least one slave in error status 003117 : Slave error " Slave_1001 [0xFFFFFFFF] ": - EtherCAT address=1001 - State <PREOP ERROR>(0x12), control status <Invalid Output Configuration>(0x1d) 003117 : Slave init command response error - Slave Slave_1001 [0xFFFFFFFF] : - EtherCAT address=1001 - Current State change of slave="PREOP to SAFEOP" target state could not be reached 003118 : CEcSlave::ProcessCmdResult() Slave_1001 [0xFFFFFFFF] : unprocessed dwInvokeId (0x2) 003119 : ecatSetMasterState() Error 0x98110024 in McSm state 'WAIT_MASTER_SAFEOP' for requested state 'MASTER_SAFEOP_DONE' 003119 : Cannot start set master state to SAFEOP (Result = ERROR: Slave error (0x98110024))

however when the output size is 664 bits everything works as expected.
Why do I get this error?
I did some tests using a oscilloscope and it seems the controller does work correctly so somehow the slave stack does have a problem updating this amount of bits.
When using a old version of SOES I don't get the error but the Inputs in the Master do not update however the ESC_read is called by the code.

With soesv3 form #52 I get the same error code .

Both the object-files are attached, the difference is the PDO length. I did add the slaveinfo as well.
objectfile.zip
output_slaveinfo.txt

Conformance test tool problem

Goodmorning to all,
I'm using the conformance test tool ( CTT Beckhoff) to debug my ethercat device. This device implements SOES on a STM32 F4 and I have done a personalized driver for the LAN9252. If I run the CTT tool, it return an error in the first test block

It seems that the error is connected to register 0x134, which is called ESCREG_ALERROR and represents the AL Status code register. From the Beckoff documentation "https://download.beckhoff.com/download/document/io/ethercat-development-products/ethercat_esc_datasheet_sec2_registers_2i9.pdf", in particular page 33, it is clear that in order to cancel the "device identification" it is necessary to reset bit n°5 (counting from 0). Since this register can be rewritten only when the simulation mode is active (in my case it is not active ), it is nothing more than a copy of the AL Control register (0x120). So I tried to set bit °5 of this register to 0, but the problem was not solved. Can anyone help me?
I enclose further images regarding this error.

After this first test I reset the device and I run the other tests of CTT tool and it has returned another error, related to the state machine. In particular, the state transitions from OP mode to any other mode (e.g. PREOP, SAFEOP, etc...), I report below some images about it. I do not know if this error can be related to the previous one.

Another information that can be usefull is that with the Twincat (Beckoff) the device go to OP state and if I change manually the state the device does no go in error and the Twincat run without errors. I do not understand where the problem is, can be a SOES problem?

Thanks.

FoE with LAN9252

Hi! First of all, thank you @nakarlsson and associates for your fantastic work on SOES. I really appreciate that such industrial software can be made open-source and easily understandable.

I'm working on a bootstrap implementation using the Microchip LAN9252 and SOES running on an STM32F4. I have replaced the SPI interface functions in the lan9252 driver that was intended for Linux, and have also rewritten the bootstrap code from the rtl slave example to work with the STM32's internal flash memory. I am using the EEPROM configuration file provided for the LAN9252 by the linux lan9252 example, since the stock EEPROM file on the LAN9252-SPI evaluation board does not have the correct PDI settings etc, and has FoE disabled.

Currently, I am able to trigger the LAN9252 and SOES stack to enter into bootloader mode by running the firm_update example on SOEM. After the firm_update program sends its first FoE request, the slave prints the following:

soes: state 2
soes: state 1
soes: init_to_boot_hook (part of my bootstrap code)
soes: state 3
soes: boot_started: 14347, boot_watch_dog: 214347
soes: erased all firmware sectors (this is part of my bootstrap code)
soes: firmware flash sectors erased (this is part of my bootstrap code)
soes: FOE_OP_WRQ
soes: FOE_init
soes: FOE_write
soes: FOE_send_ack

It seems that the slave enters bootloader mode and tries to send an ack to SOEM, but on the SOEM side, the ecx_FPRD on line 1038 of ethercatmain.c returns a mailbox error (MBXEp->Detail = 1044). This causes the FoE transfer to fail without sending any of the actual firmware data that I am trying to upload.

I've been stuck on this bug for a while, and am wondering what probable causes I should look into. Any pointers or advice would be greatly appreciated!

Using SOES or modifying the SOEM

I am currently trying to use an old ethercat driver that initially was working with the old ros_ethercat_eml master implementation. I want to change and use soem. When using the slaveinfo to read the drive info, I get the following:
The extra information I printed was to see at what stage the values were configured.

Slave 1: old EtherCat slave
slave 2: new EtherCat slave
slave 3: new EtherCat slave

SOEM (Simple Open EtherCAT Master)
Slaveinfo
Starting slaveinfo
ec_init on eth1 succeeded.
Number of slaves: 3
**********Debugging information(Before mapping configuration)**********

***********************************Slave 1 info***********************************
slave 1 ->Driver state 17
slave 1 ->Configured address: 1001
slave 1 ->output bit: 0
slave 1 ->output bytes:0
slave 1 ->startbit in first output byte 0
slave 1 -> input bit:0
slave 1 -> input bytes:0
slave 1 ->SM: 0: Start Address: 0x0
slave 1 ->SM: 0: Length: 0x0
slave 1 ->SM: 0: Flags: 0x0

slave 1 ->SM: 1: Start Address: 0x0
slave 1 ->SM: 1: Length: 0x0
slave 1 ->SM: 1: Flags: 0x0

slave 1 ->SM: 2: Start Address: 0x0
slave 1 ->SM: 2: Length: 0x0
slave 1 ->SM: 2: Flags: 0x0

slave 1 ->SM: 3: Start Address: 0x0
slave 1 ->SM: 3: Length: 0x0
slave 1 ->SM: 3: Flags: 0x0

slave 1 ->FMMU: 0:  Logical start address: 0x0
slave 1 ->FMMU: 0:  Logical length: 0x0
slave 1 ->FMMU: 0:  Logical StartBit: 0x0
slave 1 ->FMMU: 0:  Logical EndBit: 0x0
slave 1 ->FMMU: 0:  Physical start address: 0x0
slave 1 ->FMMU: 0:   Physical StartBit: 0x0
slave 1 ->FMMU: 0:  FMMUtype: 0x0
slave 1 ->FMMU: 0:  FMMUactive: 0x0
slave 1 ->FMMU: 0:  unused1: 0x0
slave 1 ->FMMU: 0:  unused1: 0x0

Slave 1: old EtherCat slave
slave 2: new EtherCat slave
slave 3: new EtherCat slave
**********Debugging information(Before mapping configuration)**********

***********************************Slave 1 info***********************************
slave 1 ->Driver state 17
slave 1 ->
slave 1 ->FMMU: 1:  Logical start address: 0x0
slave 1 ->FMMU: 1:  Logical length: 0x0
slave 1 ->FMMU: 1:  Logical StartBit: 0x0
slave 1 ->FMMU: 1:  Logical EndBit: 0x0
slave 1 ->FMMU: 1:  Physical start address: 0x0
slave 1 ->FMMU: 1:   Physical StartBit: 0x0
slave 1 ->FMMU: 1:  FMMUtype: 0x0
slave 1 ->FMMU: 1:  FMMUactive: 0x0
slave 1 ->FMMU: 1:  unused1: 0x0
slave 1 ->FMMU: 1:  unused1: 0x0

slave 1 -> FMMU0 function: 0
slave 1 ->FMMUslave function: 0
slave 1 ->FMMU2 function: 0
slave 1 ->FMMU3 function: 0
slave 1 ->length of write mailbox in bytes: 0
slave 1 ->length of read mailbox: 0x0
slave 1 ->mailbox supported protocols: 0x0
slave 1 ->Counter value of mailbox link layer protocol slave: 0
slave 1 ->CoE details: 0
slave 1 ->first unused FMMU: 0


***********************************Slave 2 info***********************************
slave 2 ->Driver state 1
slave 2 ->Configured address: 1002
slave 2 ->output bit: 0
slave 2 ->output bytes:0
slave 2 ->startbit in first output byte 0
slave 2 -> input bit:0
slave 2 -> input bytes:0
slave 2 ->SM: 0: Start Address: 0x1000
slave 2 ->SM: 0: Length: 0x80
slave 2 ->SM: 0: Flags: 0x10026

slave 2 ->SM: 1: Start Address: 0x1080
slave 2 ->SM: 1: Length: 0x80
slave 2 ->SM: 1: Flags: 0x10022

slave 2 ->SM: 2: Start Address: 0x1100
slave 2 ->SM: 2: Length: 0x0
slave 2 ->SM: 2: Flags: 0x10024

slave 2 ->SM: 3: Start Address: 0x1180
slave 2 ->SM: 3: Length: 0x0
slave 2 ->SM: 3: Flags: 0x10020

slave 2 ->FMMU: 0:  Logical start address: 0x0
slave 2 ->FMMU: 0:  Logical length: 0x0
slave 2 ->FMMU: 0:  Logical StartBit: 0x0
slave 2 ->FMMU: 0:  Logical EndBit: 0x0
slave 2 ->FMMU: 0:  Physical start address: 0x0
slave 2 ->FMMU: 0:   Physical StartBit: 0x0
slave 2 ->FMMU: 0:  FMMUtype: 0x0
slave 2 ->FMMU: 0:  FMMUactive: 0x0
slave 2 ->FMMU: 0:  unused1: 0x0
slave 2 ->FMMU: 0:  unused1: 0x0

slave 2 ->FMMU: 1:  Logical start address: 0x0
slave 2 ->FMMU: 1:  Logical length: 0x0
slave 2 ->FMMU: 1:  Logical StartBit: 0x0
slave 2 ->FMMU: 1:  Logical EndBit: 0x0
slave 2 ->FMMU: 1:  Physical start address: 0x0
slave 2 ->FMMU: 1:   Physical StartBit: 0x0
slave 2 ->FMMU: 1:  FMMUtype: 0x0
slave 2 ->FMMU: 1:  FMMUactive: 0x0
slave 2 ->FMMU: 1:  unused1: 0x0
slave 2 ->FMMU: 1:  unused1: 0x0

slave 2 -> FMMU0 function: 1
slave 2 ->FMMUslave function: 2
slave 2 ->FMMU2 function: 0
slave 2 ->FMMU3 function: 0
slave 2 ->length of write mailbox in bytes: 128
slave 2 ->length of read mailbox: 0x80
slave 2 ->mailbox supported protocols: 0xc
slave 2 ->Counter value of mailbox link layer protocol slave: 0
slave 2 ->CoE details: 23
slave 2 ->first unused FMMU: 0


***********************************Slave 3 info***********************************
slave 3 ->Driver state 1
slave 3 ->Configured address: 1003
slave 3 ->output bit: 0
slave 3 ->output bytes:0
slave 3 ->startbit in first output byte 0
slave 3 -> input bit:0
slave 3 -> input bytes:0
slave 3 ->SM: 0: Start Address: 0x1000
slave 3 ->SM: 0: Length: 0x80
slave 3 ->SM: 0: Flags: 0x10026

slave 3 ->SM: 1: Start Address: 0x1400
slave 3 ->SM: 1: Length: 0x80
slave 3 ->SM: 1: Flags: 0x10022

slave 3 ->SM: 2: Start Address: 0x1800
slave 3 ->SM: 2: Length: 0xb
slave 3 ->SM: 2: Flags: 0x10064

slave 3 ->SM: 3: Start Address: 0x1c00
slave 3 ->SM: 3: Length: 0xb
slave 3 ->SM: 3: Flags: 0x10020

slave 3 ->FMMU: 0:  Logical start address: 0x0
slave 3 ->FMMU: 0:  Logical length: 0x0
slave 3 ->FMMU: 0:  Logical StartBit: 0x0
slave 3 ->FMMU: 0:  Logical EndBit: 0x0
slave 3 ->FMMU: 0:  Physical start address: 0x0
slave 3 ->FMMU: 0:   Physical StartBit: 0x0
slave 3 ->FMMU: 0:  FMMUtype: 0x0
slave 3 ->FMMU: 0:  FMMUactive: 0x0
slave 3 ->FMMU: 0:  unused1: 0x0
slave 3 ->FMMU: 0:  unused1: 0x0

slave 3 ->FMMU: 1:  Logical start address: 0x0
slave 3 ->FMMU: 1:  Logical length: 0x0
slave 3 ->FMMU: 1:  Logical StartBit: 0x0
slave 3 ->FMMU: 1:  Logical EndBit: 0x0
slave 3 ->FMMU: 1:  Physical start address: 0x0
slave 3 ->FMMU: 1:   Physical StartBit: 0x0
slave 3 ->FMMU: 1:  FMMUtype: 0x0
slave 3 ->FMMU: 1:  FMMUactive: 0x0
slave 3 ->FMMU: 1:  unused1: 0x0
slave 3 ->FMMU: 1:  unused1: 0x0

slave 3 -> FMMU0 function: 1
slave 3 ->FMMUslave function: 2
slave 3 ->FMMU2 function: 3
slave 3 ->FMMU3 function: 0
slave 3 ->length of write mailbox in bytes: 128
slave 3 ->length of read mailbox: 0x80
slave 3 ->mailbox supported protocols: 0xe
slave 3 ->Counter value of mailbox link layer protocol slave: 0
slave 3 ->CoE details: 47
slave 3 ->first unused FMMU: 0




**********End of debugging(Before mapping configuration)**********







**********Debugging information(After mapping configuration)**********

***********************************Slave 1 info***********************************
slave 1 ->Driver state 18
slave 1 ->Configured address: 1001
slave 1 ->output bit: 0
slave 1 ->output bytes:0
slave 1 ->startbit in first output byte 0
slave 1 -> input bit:0
slave 1 -> input bytes:0
slave 1 ->SM: 0: Start Address: 0x0
slave 1 ->SM: 0: Length: 0x0
slave 1 ->SM: 0: Flags: 0x0

slave 1 ->SM: 1: Start Address: 0x0
slave 1 ->SM: 1: Length: 0x0
slave 1 ->SM: 1: Flags: 0x0

slave 1 ->SM: 2: Start Address: 0x0
slave 1 ->SM: 2: Length: 0x0
slave 1 ->SM: 2: Flags: 0x0

slave 1 ->SM: 3: Start Address: 0x0
slave 1 ->SM: 3: Length: 0x0
slave 1 ->SM: 3: Flags: 0x0

slave 1 ->FMMU: 0:  Logical start address: 0x0
slave 1 ->FMMU: 0:  Logical length: 0x0
slave 1 ->FMMU: 0:  Logical StartBit: 0x0
slave 1 ->FMMU: 0:  Logical EndBit: 0x0
slave 1 ->FMMU: 0:  Physical start address: 0x0
slave 1 ->FMMU: 0:   Physical StartBit: 0x0
slave 1 ->FMMU: 0:  FMMUtype: 0x0
slave 1 ->FMMU: 0:  FMMUactive: 0x0
slave 1 ->FMMU: 0:  unused1: 0x0
slave 1 ->FMMU: 0:  unused1: 0x0

slave 1 ->FMMU: 1:  Logical start address: 0x0
slave 1 ->FMMU: 1:  Logical length: 0x0
slave 1 ->FMMU: 1:  Logical StartBit: 0x0
slave 1 ->FMMU: 1:  Logical EndBit: 0x0
slave 1 ->FMMU: 1:  Physical start address: 0x0
slave 1 ->FMMU: 1:   Physical StartBit: 0x0
slave 1 ->FMMU: 1:  FMMUtype: 0x0
slave 1 ->FMMU: 1:  FMMUactive: 0x0
slave 1 ->FMMU: 1:  unused1: 0x0
slave 1 ->FMMU: 1:  unused1: 0x0

slave 1 -> FMMU0 function: 0
slave 1 ->FMMUslave function: 0
slave 1 ->FMMU2 function: 0
slave 1 ->FMMU3 function: 0
slave 1 ->length of write mailbox in bytes: 0
slave 1 ->length of read mailbox: 0x0
slave 1 ->mailbox supported protocols: 0x0
slave 1 ->Counter value of mailbox link layer protocol slave: 0
slave 1 ->CoE details: 0
slave 1 ->first unused FMMU: 0


***********************************Slave 2 info***********************************
slave 2 ->Driver state 2
slave 2 ->Configured address: 1002
slave 2 ->output bit: 50
slave 2 ->output bytes:a
slave 2 ->startbit in first output byte 0
slave 2 -> input bit:b8
slave 2 -> input bytes:17
slave 2 ->SM: 0: Start Address: 0x1000
slave 2 ->SM: 0: Length: 0x80
slave 2 ->SM: 0: Flags: 0x10026

slave 2 ->SM: 1: Start Address: 0x1080
slave 2 ->SM: 1: Length: 0x80
slave 2 ->SM: 1: Flags: 0x10022

slave 2 ->SM: 2: Start Address: 0x1100
slave 2 ->SM: 2: Length: 0xa
slave 2 ->SM: 2: Flags: 0x10024

slave 2 ->SM: 3: Start Address: 0x1180
slave 2 ->SM: 3: Length: 0x17
slave 2 ->SM: 3: Flags: 0x10020

slave 2 ->FMMU: 0:  Logical start address: 0x0
slave 2 ->FMMU: 0:  Logical length: 0xa
slave 2 ->FMMU: 0:  Logical StartBit: 0x0
slave 2 ->FMMU: 0:  Logical EndBit: 0x7
slave 2 ->FMMU: 0:  Physical start address: 0x1100
slave 2 ->FMMU: 0:   Physical StartBit: 0x0
slave 2 ->FMMU: 0:  FMMUtype: 0x2
slave 2 ->FMMU: 0:  FMMUactive: 0x1
slave 2 ->FMMU: 0:  unused1: 0x0
slave 2 ->FMMU: 0:  unused1: 0x0

slave 2 ->FMMU: 1:  Logical start address: 0x15
slave 2 ->FMMU: 1:  Logical length: 0x17
slave 2 ->FMMU: 1:  Logical StartBit: 0x0
slave 2 ->FMMU: 1:  Logical EndBit: 0x7
slave 2 ->FMMU: 1:  Physical start address: 0x1180
slave 2 ->FMMU: 1:   Physical StartBit: 0x0
slave 2 ->FMMU: 1:  FMMUtype: 0x1
slave 2 ->FMMU: 1:  FMMUactive: 0x1
slave 2 ->FMMU: 1:  unused1: 0x0
slave 2 ->FMMU: 1:  unused1: 0x0

slave 2 -> FMMU0 function: 1
slave 2 ->FMMUslave function: 2
slave 2 ->FMMU2 function: 0
slave 2 ->FMMU3 function: 0
slave 2 ->length of write mailbox in bytes: 128
slave 2 ->length of read mailbox: 0x80
slave 2 ->mailbox supported protocols: 0xc
slave 2 ->Counter value of mailbox link layer protocol slave: 2
slave 2 ->CoE details: 23
slave 2 ->first unused FMMU: 2


***********************************Slave 3 info***********************************
slave 3 ->Driver state 2
slave 3 ->Configured address: 1003
slave 3 ->output bit: 58
slave 3 ->output bytes:b
slave 3 ->startbit in first output byte 0
slave 3 -> input bit:58
slave 3 -> input bytes:b
slave 3 ->SM: 0: Start Address: 0x1000
slave 3 ->SM: 0: Length: 0x80
slave 3 ->SM: 0: Flags: 0x10026

slave 3 ->SM: 1: Start Address: 0x1400
slave 3 ->SM: 1: Length: 0x80
slave 3 ->SM: 1: Flags: 0x10022

slave 3 ->SM: 2: Start Address: 0x1800
slave 3 ->SM: 2: Length: 0xb
slave 3 ->SM: 2: Flags: 0x10064

slave 3 ->SM: 3: Start Address: 0x1c00
slave 3 ->SM: 3: Length: 0xb
slave 3 ->SM: 3: Flags: 0x10020

slave 3 ->FMMU: 0:  Logical start address: 0xa
slave 3 ->FMMU: 0:  Logical length: 0xb
slave 3 ->FMMU: 0:  Logical StartBit: 0x0
slave 3 ->FMMU: 0:  Logical EndBit: 0x7
slave 3 ->FMMU: 0:  Physical start address: 0x1800
slave 3 ->FMMU: 0:   Physical StartBit: 0x0
slave 3 ->FMMU: 0:  FMMUtype: 0x2
slave 3 ->FMMU: 0:  FMMUactive: 0x1
slave 3 ->FMMU: 0:  unused1: 0x0
slave 3 ->FMMU: 0:  unused1: 0x0

slave 3 ->FMMU: 1:  Logical start address: 0x2c
slave 3 ->FMMU: 1:  Logical length: 0xb
slave 3 ->FMMU: 1:  Logical StartBit: 0x0
slave 3 ->FMMU: 1:  Logical EndBit: 0x7
slave 3 ->FMMU: 1:  Physical start address: 0x1c00
slave 3 ->FMMU: 1:   Physical StartBit: 0x0
slave 3 ->FMMU: 1:  FMMUtype: 0x1
slave 3 ->FMMU: 1:  FMMUactive: 0x1
slave 3 ->FMMU: 1:  unused1: 0x0
slave 3 ->FMMU: 1:  unused1: 0x0

slave 3 -> FMMU0 function: 1
slave 3 ->FMMUslave function: 2
slave 3 ->FMMU2 function: 3
slave 3 ->FMMU3 function: 0
slave 3 ->length of write mailbox in bytes: 128
slave 3 ->length of read mailbox: 0x80
slave 3 ->mailbox supported protocols: 0xe
slave 3 ->Counter value of mailbox link layer protocol slave: 5
slave 3 ->CoE details: 47
slave 3 ->first unused FMMU: 2




**********End of debugging(After mapping configuration)**********





3 slaves found and configured.
Calculated workcounter 6

Slave:1
 Name:? M:0000eeee I:0067d60d
 Output size: 0bits
 Input size: 0bits
 State: 4
 Delay: 0[ns]
 Has DC: 1
 DCParentport:0
 Activeports:1.1.0.0
 Configured address: 1001
 Man: 0000eeee ID: 0067d60d Rev: 06020115
 FMMUfunc 0:0 1:0 2:0 3:0
 MBX length wr: 0 rd: 0 MBX protocols : 00
 CoE details: 00 FoE details: 00 EoE details: 00 SoE details: 00
 Ebus current: 0[mA]
 only LRD/LWR:0

Slave:2
 Name:E/BOX
 Output size: 80bits
 Input size: 184bits
 State: 4
 Delay: 600[ns]
 Has DC: 1
 DCParentport:1
 Activeports:1.1.0.0
 Configured address: 1002
 Man: 00000500 ID: 01107001 Rev: 00000004
 SM0 A:1000 L: 128 F:00010026 Type:1
 SM1 A:1080 L: 128 F:00010022 Type:2
 SM2 A:1100 L:  10 F:00010024 Type:3
 SM3 A:1180 L:  23 F:00010020 Type:4
 FMMU0 Ls:00000000 Ll:  10 Lsb:0 Leb:7 Ps:1100 Psb:0 Ty:02 Act:01
 FMMU1 Ls:00000015 Ll:  23 Lsb:0 Leb:7 Ps:1180 Psb:0 Ty:01 Act:01
 FMMUfunc 0:1 1:2 2:0 3:0
 MBX length wr: 128 rd: 128 MBX protocols : 0c
 CoE details: 17 FoE details: 01 EoE details: 00 SoE details: 00
 Ebus current: 0[mA]
 only LRD/LWR:0

Slave:3
 Name:Servo Drives
 Output size: 88bits
 Input size: 88bits
 State: 4
 Delay: 1460[ns]
 Has DC: 1
 DCParentport:1
 Activeports:1.0.0.0
 Configured address: 1003
 Man: 0000029c ID: 02c30001 Rev: 00000003
 SM0 A:1000 L: 128 F:00010026 Type:1
 SM1 A:1400 L: 128 F:00010022 Type:2
 SM2 A:1800 L:  11 F:00010064 Type:3
 SM3 A:1c00 L:  11 F:00010020 Type:4
 FMMU0 Ls:0000000a Ll:  11 Lsb:0 Leb:7 Ps:1800 Psb:0 Ty:02 Act:01
 FMMU1 Ls:0000002c Ll:  11 Lsb:0 Leb:7 Ps:1c00 Psb:0 Ty:01 Act:01
 FMMUfunc 0:1 1:2 2:3 3:0
 MBX length wr: 128 rd: 128 MBX protocols : 0e
 CoE details: 2f FoE details: 01 EoE details: 01 SoE details: 00
 Ebus current: 0[mA]
 only LRD/LWR:0
End slaveinfo, close socket
End program

The old code of this particular drive seem to hard code this addresses and configure them manually. 
Is it possible to set the addresses of the fmmu, sm, object list with soes or is it better to modify SOEM during the configuration stage and assign this addresses manually because SOEM is not able to read them.


An example of this is shown below 
Configuration of the FFMU and SM 

EtherCAT_FMMU_Config *fmmu = new EtherCAT_FMMU_Config(2);
//ROS_DEBUG("device %d, command 0x%X = 0x10000+%d", (int)sh->get_ring_position(), start_address, start_address-0x10000);
(*fmmu)[0] = EC_FMMU(start_address, // Logical start address
command_size_,// Logical length
0x00, // Logical StartBit
0x07, // Logical EndBit
COMMAND_PHY_ADDR, // Physical Start address
0x00, // Physical StartBit
false, // Read Enable
true, // Write Enable
true); // Enable

start_address += command_size_;

//ROS_DEBUG("device %d, status 0x%X = 0x10000+%d", (int)sh->get_ring_position(), start_address, start_address-0x10000);
(*fmmu)[1] = EC_FMMU(start_address, // Logical start address
base_status, // Logical length
0x00, // Logical StartBit
0x07, // Logical EndBit
STATUS_PHY_ADDR, // Physical Start address
0x00, // Physical StartBit
true, // Read Enable
false, // Write Enable
true); // Enable

start_address += base_status;

sh->set_fmmu_config(fmmu);

EtherCAT_PD_Config *pd = new EtherCAT_PD_Config(4);

// Sync managers
(*pd)[0] = EC_SyncMan(COMMAND_PHY_ADDR, command_size_, EC_BUFFERED, EC_WRITTEN_FROM_MASTER);
(*pd)[0].ChannelEnable = true;
(*pd)[0].ALEventEnable = true;

(*pd)[1] = EC_SyncMan(STATUS_PHY_ADDR, base_status);
(*pd)[1].ChannelEnable = true;

(*pd)[2] = EC_SyncMan(WGMailbox::MBX_COMMAND_PHY_ADDR, WGMailbox::MBX_COMMAND_SIZE, EC_QUEUED, EC_WRITTEN_FROM_MASTER);
(*pd)[2].ChannelEnable = true;
(*pd)[2].ALEventEnable = true;

(*pd)[3] = EC_SyncMan(WGMailbox::MBX_STATUS_PHY_ADDR, WGMailbox::MBX_STATUS_SIZE, EC_QUEUED);
(*pd)[3].ChannelEnable = true;

sh->set_pd_config(pd);

FOE_fwrite is unable to detect a failure if write_function fails to write on last data.

I think there is a problem that FOE_fwrite() cannot detect failure if write_function() failed writing on last data.

The following code checks if FOE_fwrite() can write the entire data correctly.

SOES/soes/esc_foe.c

Lines 473 to 477 in fc72fbe

	if (ncopied != data_len)
	{
	DPRINT("FOE_data only %d of %d copied\n",ncopied, data_len);
	FOE_abort (FOE_ERR_PROGERROR);
	}

However, at line 165, ncopied is incremented even if foe_file->write_function() returns a failure flag.
This only matters if the last data write fails.

SOES/soes/esc_foe.c

Lines 154 to 166 in fc72fbe

	while (length && (FOEvar.fend - FOEvar.fposition) && !failed)
	{
	length--;
	foe_cfg->fbuffer[FOEvar.fbufposition++] = *(data++);
	if(FOEvar.fbufposition >= foe_cfg->buffer_size)
	{
	failed = foe_file->write_function (foe_file, foe_cfg->fbuffer, FOEvar.fbufposition);
	FOEvar.fbufposition = 0;
	foe_file->address_offset += foe_cfg->buffer_size;
	}
	FOEvar.fposition++;
	ncopied++;
	}

I suggest the following fixes.

       if(failed)
       {
          DPRINT("Failed FOE_fwite ncopied=%d\n", ncopied);
       }
       else
       {
          ncopied++;
       }

EoE potentially invalid check data_offset > eoedatasize

See OpenEtherCATsociety/SOEM#421

SDO and Mailbox help, 16 bit aligned support?

Just wondering if their is a 16 bit minimum data size version of SOES or if there is any plans to make one in the future?

To add onto that, I am having an issue getting SDO working from the slave side, it seems like my slave mailboxes are not working correctly.

**EDIT

I guess I might be having some confusion, does the SDO data get passed to and from the mailbox? I seem to be reading and writing mailboxes but they seem to only be of length 10 for recieving or 4 for sending.

If I write my own SOEM program that writes to the SDO it seems I can increase the mailbox length but still no SDO is getting output. Seems like I am reading erroneous data.

In twincat, the COE tab shows the device as offline, am I forgetting to run a function in SOES or is something getting mangled.

---

when I run slaveinfo with SDO i get this.
length = 0xA
address = 0x0
channel = 0x0
priority = 0x0
mbxtype = 0x3
mbxcnt = 0x1

**Note, 16 bits for each MBX
MBX [3] = 0
MBX [4] = 8192
MBX [5] = 64
MBX [6] = 28

For the coeprocess call, I always seem to get MBX_error (MBXERR_INVALIDSIZE);

void ESC_coeprocess (void)
{
   _MBXh *mbh;
   _COEsdo *coesdo;
   _COEobjdesc *coeobjdesc;
   uint16_t service;
   if (ESCvar.MBXrun == 0)
   {
      return;
   }
   if (!ESCvar.xoe && (MBXcontrol[0].state == MBXstate_inclaim))
   {
      mbh = (_MBXh *) &MBX[0];
      if (mbh->mbxtype == MBXCOE)
      {
         if (etohs (mbh->length) < COE_MINIMUM_LENGTH)
         {
            MBX_error (MBXERR_INVALIDSIZE);
         }
         else
         {
            ESCvar.xoe = MBXCOE;
         }
      }
   }

Read out PDOs that are not directly adressed to the slave

Hello,

I am asking myself if it is possible for the slave device to read out PDOs that are not directly adressed to it by the master device?
Since the EtherCAT frame is transferred through all devices and sent back to the master, I thought that it may be possible to access the data on the fly?
Or does one have to configure the slave device on the EtherCAT-master in order to be able to access any PDO?

Thanks in advance!

DPRINT depends on rpint library that is not available for ARM cortex M4

As one of the supported hardware for SOES is the XMC microcontroller family from Infineon, I think make sense that the code should be able to compile for it as well. With the current implementation of the DPRINT is not possible as the rprint library is no available for cortex m4.

Do you think that including a rprint.h file in the xmc_hal folder that retarget the rprintp function to printf would be a nice solution.

SOES running on Infineon KIT_XMC48_RELAX_ECAT_V1 but slaveinfo reports "No slaves found!"

I have the SOES code compiled and running on the Infineon XMC48 Relax evaluation board (using DAVE4). I also have the SOEM running on a freescale powerPC based target and am trying to get the slaveinfo app to detect the slave. It reports:
-$ slaveinfo "memac1"
Starting slaveinfo
ec_init on memac1 succeeded.
ec_config_init 0
No slaves found!
End slaveinfo, close socket

Using wireshark I see four broadcast frames from the master but the slave does not respond. I have attached the wireshark capture. Is there additional configuration either in the SOES or SOEM code that is required for these to communicate? I am running the code as-is from the repo including the sii_eeprom.bin from the SOES side. Thank you.
slaveinfo.pcapng.txt

Please implement EoE

"Ethernet over EtherCAT" (EoE) seems not to be supported yet by SOES.
This is a pitty, as I would like to use EoE to connect from my Master EtherCAT PC to my EtherCAT Slave PC in order to establish for example a Telnet or FTP connection.

DC Clock implementation on STM32F4 and LAN9252

Goodmorning to all,
I'm using a Pc with Ubuntu as Ethercat master and an ethercat slave which uses a LAN9252.
The slave is connected to a pc with window which is used to load the SOES program and once the software has been loaded, it remains connected in debug mode for checking the variables. I'm using SOEM in Ubuntu 16.04 ROS kinetic and I'm working with the SOEM package developed here. The SOES run on a STM32 F4 and we have done a personalized driver for the LAN9252. I need to implement the DC clock in the slave in order to synchronize the communication between master and multiple slaves. Someone can help me?

Thanks.

Slave Editor generates incompatible code

Hi

Slave Editor generates soes.c code where ESC_write and ESC_read functions have 4 parameters when all the other calls of these functions all over the soes stack have only three parameters!?!

For instance:

soes.c (generated by the "slave editor"):
void TXPDO_update (void)
{
ESC_write (SM3_sma, &Rb, TXPDOsize, (void *) &ESCvar.ALevent);
}

esc.h (file from soes stack):
void ESC_write (uint16_t address, void *buf, uint16_t len);

The same happens with ESC_read()!

I am solving this manually editing the soes.c file generated by the "slave editor" but it would be nice to have a compatible code.

Regards,
Helio

How do I build the SOES executables?

Could someone please add to SOES readme how to get started and build the executables? I bought a RPI4, and was able to easily get the master built, and a program called demo for the slave (using the SOEM instructions). When I run both, nothing happens.
I spent hours and hours trying to compile other demos, but as a MS Visual Studio user I failed.

Maybe copy and paste and add the build instructions from here:
https://github.com/OpenEtherCATsociety/SOEM#readme

Problem with SOES on STM32 with LAN9252

Hi,
I am trying to run EtherCAT communication between STM32F4 using LAN9252 (via SPI) with the SOES library and computer using examples from the SOEM library. I use the v2.2.0 of SOES library, because this is the latest version compatible with the EtherCAT Slave Editor. Like the hal driver for LAN9252 I use the file esc_hw.c taken from SOES/soes/hal/rt-kernel-lan9252. In this file, I replaced only the functions responsible for SPI communication (spi_select, write, read) with the corresponding for STM32 and comment a few lines of SPI initialization (in STM32 this is done differently and elsewhere). I created the project using user manual from rt-labs page, and made minor edits due to the use of STM32. After successfully building the code, I checked the operation of the ESC using EtherCAT Explorer:

• EEPROM write/read works,
• ESC register reading works,
• switching the state machine works (including the OP state),

but

• it is impossible to read the Object Dictionary,
• the Process Image tab is also empty,
• in the console, the message "Lost frame" constantly appears.

Next, I made sure that communication between the MCU and the LAN9252 over SPI works using a debugger. After a successful SPI check, I used the simple_test example from the SOEM library and received the following response (instead of XXX… in program response I had my net card address or something like this):

SOEM (Simple Open EtherCAT Master)
Simple test
Starting simple test
ec_init on \ Device \ NPF_ {XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX} succeeded.
1 slaves found and configured.
Slaves mapped, state to SAFE_OP.
segments: 1: 0 0 0 0
Request operational state for all slaves
Calculated workcounter 0
Operational state reached for all slaves.
OK: all slaves resumed OPERATIONAL.
OK: all slaves resumed OPERATIONAL.
OK: all slaves resumed OPERATIONAL.
.....

and response form slaveinfo example from SOEM:

SOEM (Simple Open EtherCAT Master)
Slaveinfo
Starting slaveinfo
ec_init on \Device\NPF_{XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX} succeeded.
Time:  268497.215 MBX slave:1 error:0005 Invalid mailbox header
Time:  268497.216 MBX slave:1 error:0005 Invalid mailbox header
...
lots of the same messages with incrementing time value...
...
Time:  268497.280 MBX slave:1 error:0005 Invalid mailbox header
1 slaves found and configured.
Calculated workcounter 0

Slave:1
 Name:joint
 Output size: 0bits
 Input size: 0bits
 State: 4
 Delay: 0[ns]
 Has DC: 1
 DCParentport:0
 Activeports:1.0.0.0
 Configured address: 1001
 Man: 00000977 ID: 00000000 Rev: 00000000
 SM0 A:1000 L: 128 F:00010026 Type:1
 SM1 A:1080 L: 128 F:00010022 Type:2
 SM2 A:1100 L:   2 F:00010024 Type:3
 SM3 A:1180 L:   2 F:00010020 Type:4
 FMMUfunc 0:1 1:2 2:3 3:0
 MBX length wr: 128 rd: 128 MBX protocols : 04
 CoE details: 13 FoE details: 00 EoE details: 00 SoE details: 00
 Ebus current: 0[mA]
 only LRD/LWR:0
End slaveinfo, close socket
End program

The last message is repeated endlessly in the console, but from the source code "simple_test" it is clear that the program should behave differently. In EtherCAT Slave Editor, I added only one record per input and one record per output (2 bytes each) and in the code I made their rewriting and reading in the "cb_get" and "cb_set" functions.

I suspect that the communication does not work on the Application Layer but slaveinfo test shows that there are problems with mailbox (AL STATUS CODE register has value 0). What could be wrong and what should I try to do to properly configure the ESC?

Data structures not initialized properly

The data structures Rb, Wb and Cb are always initialized to 0 and are not assigned default values supplied in the objectlist.

ZYNQ7000: FoE: missing last 3 byte in each packet

Hello,

I am running SOES on ZYNQ7000 board,
It can enter operation mode and everything looks fine.
But when I try to test FoE function, I found that the last 3 byte in each packet is always missing. The rest are correct.
Any idea?
Thank you in advance.

Documentation

Hi,

is there any documentation for installation?
Was especially is kern.h?

regards,
Steffen

Let esc_hw layer for rt-kernel re-configure/release PHY reset pin

Given BSP configure ECAT_PHY_RESET as a general purpose output and set/keep PHYs in reset, let the EtherCAT slave stack handle release/re-configure of PHY reset to correct alternate function.

FoE, add variabled for holding the size of received file

Add variable in foe_writefile_cfg to hold the calculated size of the received file. The total size may be used in CRC calculations on completion.

How to know index PDO.

Hi,
I have a problem that in the process of processing PDO, How to know the index of PDO.
I for example: I use a converter from canopen to ethercat, then the packet includes index + lengt+data, how do I convert to send to Ethercat slave.

Not passing from ESC_checkSM23

Hello.
I'm implementing the lib on a STM32F4 using the LAN9252.
I generated the EEPROM and source files using your plugin for eclipse.

I cannot change the state from PRE OP.
Debugging the application i was able to identify the error is caused in the ESC_checkSM23 function.
where this validation
!(SM->ActESC & ESC_SM2_act)is causing the problem. the remaining validations:(etohs (SM->PSA) != ESC_SM2_sma) || (etohs (SM->Length) != ESCvar.ESC_SM2_sml)
|| (SM->Command != ESC_SM2_smc)`
are correct.

I'm using TwinCAT to test my slave.
Could you give a hint what could be the cause for ActESC to fail.