This is a Verilog implementation of Buffets.
Usage:
Simulate using VCS :
make all
(You may usemake all_gui
for GUI)
To run different tests:
- Open
buffet.f
- Add the desired test from
./testbench/
make all
Note: This implementation focuses on depicting the interfaces and working principles rather than optimized implementation. We recommend replacing the register file with a SRAM from a RAM generator.