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robust, optimal, and clear programming language

Home Page: https://ziglang.org

License: MIT License

CMake 0.12% Zig 97.02% C++ 0.89% C 1.67% Shell 0.04% HTML 0.03% JavaScript 0.08% Python 0.13% Assembly 0.01% Objective-C 0.01% PowerShell 0.02%

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zig IR for switch statements

switch.zig

export fn entry(a: u8) u32 { 
    var result: u32 = switch (a) {
        0 => 555,
        4 => 888,
        2,1,7 => 333,
        3 => 777,
        200...240,9,5,20...80 => 111,
        else => 999,
    };
    return result;
}

pub fn panic(msg: []const u8, error_return_trace: ?*@import("builtin").StackTrace) noreturn {
    while (true) {}
}

zig IR: zig build-obj switch.zig --verbose-ir

  fn entry() { // (analyzed)
  Entry_0:
      #10 | VarPtr                | *const u8   | 1 | &a
      #11 | LoadPtrGen            | u8          | 7 | loadptr(#10)result=(null)
      #21 | BinOp                 | bool        | 1 | #11 >= 200
      #23 | BinOp                 | bool        | 1 | #11 <= 240
      #24 | BinOp                 | bool        | 1 | #21 BoolAnd #23 // no safety
      #29 | BinOp                 | bool        | 1 | 9 == #11
      #30 | BinOp                 | bool        | 1 | #29 BoolOr #24 // no safety
      #35 | BinOp                 | bool        | 1 | 5 == #11
      #36 | BinOp                 | bool        | 1 | #35 BoolOr #30 // no safety
      #44 | BinOp                 | bool        | 1 | #11 >= 20
      #46 | BinOp                 | bool        | 1 | #11 <= 80
      #47 | BinOp                 | bool        | 1 | #44 BoolAnd #46 // no safety
      #48 | BinOp                 | bool        | 1 | #47 BoolOr #36 // no safety
      #51 | CondBr                | noreturn    | - | if (#48) $SwitchRangeYes_49 else $SwitchRangeNo_50
  SwitchRangeYes_49:
      #56 | StorePtr              | void        | - | *#54 = 111
      :54 | AllocaGen             | *u32        | 7 | Alloca(align=0,name=result)
      #59 | Br                    | noreturn    | - | goto $SwitchEnd_58
  SwitchRangeNo_50:
!     #110| SwitchBr              | noreturn    | - | switch (#11) 0 => $SwitchProng_99, 4 => $SwitchProng_101, 2 => $SwitchProng_103, 1 => $SwitchProng_103, 7 => $SwitchProng_103, 3 => $SwitchProng_107, else => $SwitchElse_109
! SwitchElse_109:
!     #114| StorePtr              | void        | - | *#54 = 999
!     #116| Br                    | noreturn    | - | goto $SwitchEnd_58
! SwitchProng_99:
!     #120| StorePtr              | void        | - | *#54 = 555
!     #122| Br                    | noreturn    | - | goto $SwitchEnd_58
! SwitchProng_101:
!     #126| StorePtr              | void        | - | *#54 = 888
!     #128| Br                    | noreturn    | - | goto $SwitchEnd_58
! SwitchProng_103:
!     #132| StorePtr              | void        | - | *#54 = 333
!     #134| Br                    | noreturn    | - | goto $SwitchEnd_58
! SwitchProng_107:
!     #138| StorePtr              | void        | - | *#54 = 777
!     #140| Br                    | noreturn    | - | goto $SwitchEnd_58
! SwitchEnd_58:
!     #147| Phi                   | u32         | 0 | $SwitchRangeYes_49:111 $SwitchElse_109:999 $SwitchProng_99:555 $SwitchProng_101:888 $SwitchProng_103:333 $SwitchProng_107:777
      #150| DeclVarGen            | void        | - | var result: u32 align(4) = #54
      #153| VarPtr                | *u32        | 1 | &result
      #154| LoadPtrGen            | u32         | 1 | loadptr(#153)result=(null)
      #159| Return                | noreturn    | - | return #154
  }

LLVM-IR: zig build-obj switch.zig --verbose-llvm-ir

define i32 @entry(i8) #2 !dbg !46 {
Entry:
  %result = alloca i32, align 4
  %a = alloca i8, align 1
  store i8 %0, i8* %a, align 1
  call void @llvm.dbg.declare(metadata i8* %a, metadata !51, metadata !DIExpression()), !dbg !54
  %1 = load i8, i8* %a, align 1, !dbg !55
  %2 = icmp uge i8 %1, -56, !dbg !56
  %3 = icmp ule i8 %1, -16, !dbg !56
  %4 = and i1 %2, %3, !dbg !56
  %5 = icmp eq i8 9, %1, !dbg !57
  %6 = or i1 %5, %4, !dbg !57
  %7 = icmp eq i8 5, %1, !dbg !58
  %8 = or i1 %7, %6, !dbg !58
  %9 = icmp uge i8 %1, 20, !dbg !59
  %10 = icmp ule i8 %1, 80, !dbg !59
  %11 = and i1 %9, %10, !dbg !59
  %12 = or i1 %11, %8, !dbg !59
  br i1 %12, label %SwitchRangeYes, label %SwitchRangeNo, !dbg !59

SwitchRangeYes:                                   ; preds = %Entry
  store i32 111, i32* %result, align 4, !dbg !60
  br label %SwitchEnd, !dbg !55

SwitchRangeNo:                                    ; preds = %Entry
  switch i8 %1, label %SwitchElse [
    i8 0, label %SwitchProng
    i8 4, label %SwitchProng1
    i8 2, label %SwitchProng2
    i8 1, label %SwitchProng2
    i8 7, label %SwitchProng2
    i8 3, label %SwitchProng3
  ], !dbg !55

SwitchElse:                                       ; preds = %SwitchRangeNo
  store i32 999, i32* %result, align 4, !dbg !61
  br label %SwitchEnd, !dbg !55

SwitchProng:                                      ; preds = %SwitchRangeNo
  store i32 555, i32* %result, align 4, !dbg !62
  br label %SwitchEnd, !dbg !55

SwitchProng1:                                     ; preds = %SwitchRangeNo
  store i32 888, i32* %result, align 4, !dbg !63
  br label %SwitchEnd, !dbg !55

SwitchProng2:                                     ; preds = %SwitchRangeNo, %SwitchRangeNo, %SwitchRangeNo
  store i32 333, i32* %result, align 4, !dbg !64
  br label %SwitchEnd, !dbg !55

SwitchProng3:                                     ; preds = %SwitchRangeNo
  store i32 777, i32* %result, align 4, !dbg !65
  br label %SwitchEnd, !dbg !55

SwitchEnd:                                        ; preds = %SwitchProng3, %SwitchProng2, %SwitchProng1, %SwitchProng, %SwitchElse, %SwitchRangeYes
  call void @llvm.dbg.declare(metadata i32* %result, metadata !52, metadata !DIExpression()), !dbg !66
  %13 = load i32, i32* %result, align 4, !dbg !67
  ret i32 %13, !dbg !68
}

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