Coder Social home page Coder Social logo

anthill's Introduction

WARNING

Project is provided as is and without any warranty
Currently only Digilent Arty board is supported
Tested with Vivado 2016.4

Update apt database

$ sudo apt update

Prepare gcc toolcahin

reference: https://github.com/riscv/riscv-gnu-toolchain
$ git clone --recursive https://github.com/riscv/riscv-gnu-toolchain.git $ cd riscv-gnu-toolchain
$ git checkout v20170503
$ git submodule update --init --recursive
$ sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev
$ ./configure --prefix=/opt/riscv32i --with-arch=rv32i
$ sudo make

Prepare fusesoc

reference: https://github.com/olofk/fusesoc
Use fusesoc modified by MIET work group
$ git clone [email protected]:miet-riscv-workgroup/fusesoc.git
$ cd fusesoc
$ git checkout current_xsim
$ sudo apt install python3-pip
$ sudo -H pip3 install -e .

Clone Anthill and prepare software

$ git clone https://github.com/miet-riscv-workgroup/anthill
$ cd anthill
$ make -C sw/uart_bootloader
$ ./sw/generate_dat.py sw/uart_bootloader/uart_bootloader.bin sw/boot.dat

Build System

In the root directory of anthill project
$ fusesoc --cores-root . build anthill --g_riscv_firmware=boot.dat
$ git checkout current_xsim
$ sudo apt install python3-pip
$ sudo -H pip3 install -e .
Directory build will be created in current directory.
Resulting .bit file will be put in the ./build/anthill_0/bld_vivado/

Power up FPGA Board

Build example user program and get bootloader ready

$ make -C sw/serial_test
$ ./sw/uart_bootloader/boot_uart.py ./sw/serial_test/serial_test_bootable.bin /dev/USBtty0

Simulation

Simulation can be done with following command:
$ fusesoc --cores-root . build anthill --g_riscv_firmware=boot.dat
Simulation output is vcd file anthill.vcd
It will be placed to ./build/anthill_0/sim-xsim/
Results can be viewed with GTKWave (install with sudo apt-get install gtkwave)

Program FPGA

Use Vivado to program Digilent Arty board.
After finish of FPGA configuring bootloader should transfer user program and start it.

anthill's People

Contributors

bqwer avatar

Watchers

 avatar  avatar

Recommend Projects

  • React photo React

    A declarative, efficient, and flexible JavaScript library for building user interfaces.

  • Vue.js photo Vue.js

    🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.

  • Typescript photo Typescript

    TypeScript is a superset of JavaScript that compiles to clean JavaScript output.

  • TensorFlow photo TensorFlow

    An Open Source Machine Learning Framework for Everyone

  • Django photo Django

    The Web framework for perfectionists with deadlines.

  • D3 photo D3

    Bring data to life with SVG, Canvas and HTML. 📊📈🎉

Recommend Topics

  • javascript

    JavaScript (JS) is a lightweight interpreted programming language with first-class functions.

  • web

    Some thing interesting about web. New door for the world.

  • server

    A server is a program made to process requests and deliver data to clients.

  • Machine learning

    Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.

  • Game

    Some thing interesting about game, make everyone happy.

Recommend Org

  • Facebook photo Facebook

    We are working to build community through open source technology. NB: members must have two-factor auth.

  • Microsoft photo Microsoft

    Open source projects and samples from Microsoft.

  • Google photo Google

    Google ❤️ Open Source for everyone.

  • D3 photo D3

    Data-Driven Documents codes.