Comments (4)
"RegCount": {
"Done": true,
"FullRegConcurWorkgroupCount": 12,
"HalfRegConcurWorkgroupCount": 24,
"RegCount": 183,
"RegType": "Pooled"
},
According to adreno640/Google_Pixel_4/ArchProbeReport.json, Does this mean "It shows a 24×183 shared 32b-register pool."?
This number is very different from the 384 x 181 mentioned in the paper.
from archprobe.
Thanks for your comment. If I understand it correctly you are confused why the pooled registers are not shared among all threads (any physical ALU has access to all register) but, rather, per physical ALU (any physical ALU only has access to its own 181 regsiters).
The number 384 is the number of all physical ALUs on chip, and there are 3 SMs contributing to this number so the registers doesn't share across SM boundary. They are isolated compute units on chip. So for each of the 384/3=128 physical ALUs there are 181 registers available (aka the value RegCount
) at most. The illustration in the figure is somehow confusing and I would apologize about that.
Other things you might want to know:
In addition, according to the following sections, we can know that nreg_max will not exceed 512.
It's just a random number so that the tests don't take too much time to run.
According to adreno640/Google_Pixel_4/ArchProbeReport.json, Does this mean "It shows a 24×183 shared 32b-register pool."?
FullRegConcurWorkgroupCount
and HalfRegConcurWorkgroupCount
are only used to decide whether register allocation has an impact on workgroup scheduling. If yes, the number of concurrent threads decreases as the number of register occupation increases, i.e., the registerd are pooled, shared among concurrent warps. Otherwise, using more or less registers wouldn't change the number of concurrent warps. Please refer to my paper for more detail.
from archprobe.
First of all thank you very much for your answer!
At the same time, I would like to thank you all for your contributions in this field, which gave me the opportunity to learn more about mobile GPUs.
This paper and ArchProbe are of great significance. I will continue to study this and hope to have the opportunity to communicate with you in the future.
Have a good day!
from archprobe.
Thank you for your appreciation. g day. :)
from archprobe.
Related Issues (9)
- Get stuck when run ./ArchProbe on Adreno 640 on Meizu 16s HOT 2
- ImageCachelineSize causes memory object allocation failure on Mali-G78 HOT 1
- Global Memory to GPU Bandwidth HOT 2
- Does this contains the code to reproduce or generate the figures or data of the document? HOT 2
- Values between in GPU hierarchy images and output files HOT 3
- How to calculate ALUs? HOT 4
- Continuous discussion about calculating the number of ALUs HOT 6
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