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Hermes-Lite2 Power Amplifier/Filter board using MRF-101
R4 and R11 at 56k clips the op amp input at just over 100 W (provided my external power meter is accurate!). 47k for both of these gives a little bit of room to before reaching the 3v3 limit.
I have modified my linHPSDR fork to read current and temperature from the ADC via the i2c read/write functions in the HL2 extended protocol. However, the noise on the ADC traces is very high. With heavy filtering in software the temperature can be read, but the current measurement have too much noise and does not allow the 100 mA bias current to be set accurately.
K13 and K11 are marked in the BoM as EC2-3NU but should be EC2-12NU. Farnell part number remains correct.
Rx signals are only present by removing FB3. I can hear RX signals through RF3. In changing to the 12 V AXICOM relays, I believe the logic of the main TX/RX relay K12 has been incorrectly assigned (by me!).
The hardware modification of cutting tracks and swapping the relay pin sets is not too appealing. I am proposing that a logic inverter (sn74ahc1gu04) and a NUD3124 are connected between the pads of FB3. Does anyone have any better solutions for already purchased PCBs?
I also notice that without this mod, Q2 gate will be pulled up to 12 V. In my PR I set the option for EXTTR or INTTR to be used for PTT. INTTR is pulled up to 3V3 through HL2 relay K2. EXTTR has no pull up. A pull up resistor footprint should probably be placed on this board in a future revision for when EXTTR is used?
4.7 uH version of T3 presents a better impedance on 160 and 80m. Confirmed by measurements.
Part number 744851470. Same footprint as existing part.
The input power attenuator gets hot, and thus effects the thermal tracking of Q1.
The input power attenuator could easily be moved away from the bias tracking.
The HL2 does not have any gateware code to talk to the ADC (to report PA current and PA temperature on the PC), this must be done via the i2c read/write functions in the protocol. These read/writes starve the normal C&C responses from the HL2. A small micro controller on the PCB could handle the ADC measurements and reduce "starving" the HL2 protocol 1 C&C responses.
A small micro controller could sit on the HL2 i2c2 bus and talk to the ADC on a separate i2c bus, within the micro filtering, power calibration tables etc. could be held. Or remove the ADC and use a micro with built in ADC?
GW2HFR pointed out the thermal tracking over compensates. The main problem is the location of the zener diode D4.
I moved the zener D4 to the the drain of Q2. There is a ground via perfectly located nearby to solder the other end to. This is the least heat affected part of this bit of the PCB. I then removed R29 and put D5 from the wiper of the digi pot to ground. Thermal testing shows this is much less aggressive in compensating.
This should be changed in a future revision of the board.
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