mahirjain25 / dds-mini-project

Digital simulation of an Automated Hospital Management System.

DDS-Mini-Project

Digital simulation of an Automated Hospital Management System.

The project aims to digitise the "waiting room scenario", by implementing a priority queue.

A patient is given priority and ID upon enqueue, and appropriately, patients are dequeued in order of their degree of seriousness.

To understand what the project really is in its simplest terms, refer to the Data FLow Diagram file.

Prerequisites

1. Logisim - to open the .circ file
2. Verilog - To compile the .v files
3. GTKWave- To view waveform in the .vcd file

dds-mini-project's Issues

Faulty flip flop behaviour.

The adder-subtractor is working fine. So is the comparator. The flip flops behave normally till they store 5, and then they reset. Needs to be fixed.

The counter for each queue resets to 0 after it is full.

We need it to count down after it is full. At present, for enqueue, counter works properly.
@suraj44 , help needed here.

Work to complete enqueue operation

@suraj44 use the circuit, I have labeled where to put which input. Use the enable pin for logic checks. When enable is 1, the clock will trigger changes.

Implement storage and traversal of array using registers.

Simple array we can try first.

Dequeue Bug

Dequeue correctly identified for a SINGLE CLOCK CYCLE. After running clock few times, the enable is activated for wrong array, giving output in wrong place.

Verilog Implementation Main Module

Implement the Main-Circuit (from Logisim) in Verilog.
Needs to be done in dataflow and behavioural models.