Maharshi Shah's Projects
Notes on Andrei Neagoie's Advanced JavaScript Concepts
Create a Bluetooth Scanner With Android's Bluetooth API
A rail shooting game developed using Unity 3D
β‘οΈ A resource to help figure out what JavaScript array method would be best to use at any given time
React based auth using firebase
A basic Node.JS Express webserver
React frontend of a blog app with rails on backend.
My first game in Unreal Engine 4
Nest JS based backend project
cascade select in one box
React based clothing webstore with Hooks, Redux, GraphQL, Firebase, Styled Components
All resources and notes from the Complete Web Developer in 2021: Zero to Mastery course
Finite State Machine on Anvyl Spartan-6 FPGA: The purpose of this project is to learn and practice synthesizable FSM construction to be tested on a FPGA board in Verilog. Design an FSM for use as a controller for a vending machine. The system has five (5) inputs: quarter, nickel, dime, soda, and diet. Further details in the project description.
C++ Syntax, Data Structures, and Algorithms Cheat Sheet
Qt based daily activity logger desktop application
Social network for developers, built on the MERN stack
Roadmap to becoming a web developer in 2021
Provided with code of the clique partitioning algorithm implementation in C, develop several modules which can call the clique partitioning code to build the datapath synthesis tool. Read project description for further details.
Data structures and algorithms implementation in C++ for technical interview
A comprehensive list of new ES features, including ES2015 (ES6), ES2016, ES2017, ES2018, ES2019
E-Commerce Builder Website
React based application with Front-end & Back-End with React, Node, Express, and PostgreSQL
Backend for the face recognition app using Node.js, Express.js and PostgreSQL
VHDL project to build a count-down timer with preset time using the seven-segment display. Basys-3 FPGA board has been used to test and verify correctness. Further details in project description.
VHDL project for designing a simple digital lock to provide an approach for identity authentication. This lock operates in three modes: programming, normal and locked. Basys-3 FPGA board used to test and verify correctness of the FSM built for the digital lock. Further details in the project description.
Implementing and testing matrix multiplication/addition algorithms on FPGA boards. β Input matrices are sent to FPGA from host terminal β Operations of FPGA are sent from host terminal β’ The above two need UART receiver β After the algorithm is finished, the results are displayed in a terminal on the host system through a UART transmitter
:books: Freely available programming books
π Algorithms and data structures implemented in JavaScript with explanations and links to further readings