leonbeier Goto Github PK
Name: Leon Beier
Type: User
Company: Protop Solutions UG
Blog: vhdplus.com
Name: Leon Beier
Type: User
Company: Protop Solutions UG
Blog: vhdplus.com
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Bluetooth Speaker with the VHDPlus Audio Extension. Uses an VHDPlus MAX10 FPGA Board to control the audio and enable more cool features
FPGA miner on Marsohod3 board with Altera/Intel MAX10 FPGA chip, 50K LEs
Code from the camera and display tutorial with blob detection. It is written with the VHDPlus IDE
CNN example with the VHDPlus IDE
Program to test the functionality of the VHDPlus Core
Demo for visual tracker.
Robot that follows a light. It is written with the VHDPlus IDE
FPGA-based USB fast communication using FT232H/FT600 chip.
:moneybag: A simplified version of an FPGA bitcoin miner :moneybag:
Expiremental Speech Recognition System using VHDL & MATLAB.
Turns the camera always in the direction of a light that is shined on it. It is written with the VHDPlus IDE
LiteX and Migen with the VHDPlus IDE
This is an example project designed with the VHDPlus IDE. This project uses a 8x32 LED Dot Matrix and a real time clock to show the time and work as timer.
Tutorial and example projects for the Arrow MAX1000 FPGA board
Project that uses the NIOS processor with NIOSDuino libraries. It is written with the VHDPlus IDE
Code from the Motor Extension tutorial with LED strip interface. It is written with the VHDPlus IDE
This is a project that showcases my knowledge with Neural Networks. For me to illustrate this I will be only using the Numpy package in python and no machine learning packages. The neural network will have an adjustable number of layers and nodes. The activation function per layer can also be changed from either relu, sigmoid or tanh. I will be using a the MNIST dataset and predict whether the image is the number one (1) or it is a different digit (0,2,3,4,5,6,7,8,9) in which it will be labeled as zero (0). I got the MNIST dataset from kaggle so, it might no longer be the original.
FPGA Design of a Neural Network for Color Detection
Logic Analyzer and Interface that works with PulseView. It is written with the VHDPlus IDE
CNN with AR0830 and Core MAX10 Ultra
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Open source projects and samples from Microsoft.
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Data-Driven Documents codes.
China tencent open source team.