lentinip / manhattandistance

Final examination of Digital Logic Design course (Reti Logiche) - A.Y. 2018/2019 Politecnico di Milano

Manhattan Distance on FPGA

Design and implementation of a hardware module on a FPGA (on Xilinx Vivado Design Suite)

Project Specifications

FPGA Target: xc7a200tfbg484-1

The specifications of the project can be found here.

Examination rules

The examination rules can be found here.

Test Bench

The test bench provided by the professor can be found here.

Built with

• Vivado Design Suite - Software suite produced by Xilinx
• VHDL - Hardware description language used

Final Report

The final report of the project can be found here.

Authors

• Pietro Lentini

License

This project is distributed under the terms of the Apache License v2.0. See file LICENSE for further information.