kvakil / venus Goto Github PK

It's currently a bit cumbersome navigating through memory using only the "Jump to" and up and down buttons located in the Memory tab. It'd be much easier if we could input an address and immediately be taken to that section in memory.

Please add the most up to date fork to the readme.
https://github.com/61c-teach/venus

You should also archive this repo as this is not actively maintaned.
Thank you for your service!!!

Venus simulator is a good resource for learning RISC-V language. As I use it for programming, I have to look up at the documents for what instructions or assembler derectives it supports, then search online for examples for that instruction. If there were some example code in the document, it will be time-saving. And we, who are taking a related course about RISC-V, are willing to finish that work.

maybe I missed soemthing substantual, but following code gives an issue:

addi x1, x0, 123
addi t0, x0, 456
sub x3, x1, t0

When tryning to simulate I get an error on sub not a legal insatruction.

cheers,
Martin

Basically I'd find it really helpful to have a feature like the Jetbrains IDEs that let you write and execute single lines of code while in debugging mode. I'm not sure of the technical complexity of such a feature, but IMO it would really help when trying to figure out why an instruction isn't doing what you expect it to

This:

lw s0 s1

does not produce any errors.

The print function of ecall in does not print consistent results if a right-shift arithmetic of zero bits is applied on a1 before calling ecall.

# Expected behavior:
lui a1, 0xDAF70
addi a0, x0, 1
ecall # Prints -621346816

# Anomalous behavior:
lui a1, 0xDAF70
srli a1, a1, 0 # Do nothing (?)
addi a0, x0, 1
ecall # Prints 3673620480

Note that 3673620480 exceeds the maximum value of a 32-bit signed integer, 2147483647. (Which, as far as I know, is how RISC-V interprets the contents of the registers by default.) Also note that -621346816 and 3673620480 have exactly the same bit pattern as a 32-bit signed and unsigned word, respectively.

Venus reports the following register values in both cases:

a0: 0x00000001
a1: 0xdaf70000

Tested on Firefox 56.0.1 (64-bit) Windows 7 and lubuntu 17.04, and Chrome 61.0.3163.100 (Official Build) (64-bit), Opera 48.0.2685.39 (PGO) all on Windows 7.

Hi,

I am not sure if this problem is in the most current version, but on http://www.kvakil.me/venus/ I get an error on

l1: bgtz  t2 l1

It tells me, "instruction with name bgt not found".
Can you fix this please?

Regards
Joachim

I think i may have found an error in sltu and sltiu instructions.
The specification for sltiu can be found at the bottom of page 13 https://riscv.org/specifications/
All the following results are from venus.

addi t0 x0 20
sltiu t1 t0 21 #t1 = 1
sltiu t2 t0 20 #t2 = 0
sltiu t3 t0 19 #t3 = 0
sltiu t4 t0 -19 #t4 = 0

All of the above cases are correct as only 21 is higher than t0.

addi t0 x0 -20
sltiu t1 t0 -19 #t1 = 0
sltiu t3 t0 -21 #t3 = 1

The above examples are incorrect.
As can be seen below, the binary value of -19 is higher than that of -20
-19 = 11111111_11111111_11111111_11101101
-20 = 11111111_11111111_11111111_11101100
Expected t1 to be 1 and not 0 as it currently is.

With unsigned numbers, -21 is lower than -20
-20 = 11111111_11111111_11111111_11101100
-21 = 11111111_11111111_11111111_11101011
Expected t3 to be 0 and not 1 as it currently is.

Both sltu and sltiu seem to have the same problem.

This:

sw x0 (4)x1

should be an error.

Consider addi x5, x0, 0xf0f. The I-type instruction takes 12-bit immediates, which are sign-extended. Probably because of the sign extension, venus disallows unsigned immediates which occupy the 12th bit. It should be allowed to use these kinds of immediates with I-type instructions (and for that matter, full 20-bit unsigned immediates with U-type etc.), especially when we only care about the lowest 12 bits.

Hello!

I noticed that the .word directives in Venus do not support referring to symbols/labels, like so:

.data
.globl A
A: .word 1
.globl B
B: .word A

The above is a typical output of compiling something like the following global variable definitions in C:

int A = 1;
int* B = &A;

Do you think it would be possible to add such support easily? If not, is there any other way to achieve the intended layout (i.e., emitting absolute addresses in the DATA section)?

By the way, the use of text in the arguments to .word currently lead to an uncaught NumberFormatException instead of an error message in the editor.

Hi there,

Just wanted to say that this is an amazing piece of work.
Keep learning and you will definitely be a remarkable developer one day.

Good luck with everything, bro ^_^

Sometimes it would be beneficial to set the PC to a specific point in memory without running some blocks of code. Currently this is not possible without adding jumps or branches to the code because we cannot modify the program counter. I think adding this feature would break the current "Prev" functionality.

Hello, it's currently bit cumbersome switching between memory locations by having to navigate all the way down to choose "Heap", "Stack", etc. It'd be much easier to do this if this option was located near or at the top of the Memory tab.

When attempting to branch further than [-2048, +2046] bits the user is presented with the error: "Branch to X too far".

This behavior seems to imply that the immediate is limited to 12 bits when in reality it is 13 bits (with the 0th bit not encoded).

Overall, branches should be allowed from [-4096 to +4094].

My environment is using the VS Code extension for venus on Windows 10. I am writing some code and came across an oddity of using .equ with the li pseudo instruction. the code looks like:

         .text
hash:    .globl   hash
         .equ     prime, 0x01000193
         .equ     seed, 0x811C9DC5
         li       a3, prime
         li       a0, seed

This results in the following error in the Venus Terminal:

AssemblerError: test.riscv:36: immediate value out of range: 16777619
li      a3, prime

However, when I remove the .equ and assign the values directly it is successful:

         .text
hash:    .globl   hash
         li       a3, 0x01000193
         li       a0, 0x811C9DC5

Looking at the riscv-asm-manual on github it appears what I'm trying to accomplish is the same as the example in the manual.