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Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

License: Apache License 2.0

Shell 0.68% JavaScript 0.04% C++ 0.07% C 2.25% Tcl 1.19% Verilog 0.11% Go 0.65% Assembly 0.74% Rust 90.36% CSS 0.03% SystemVerilog 3.15% Makefile 0.37% HTML 0.05% HCL 0.28% RPC 0.03%

caliptra-sw's Introduction

Caliptra Firmware/Software

This repository contains firmware, libraries, and tools related to the Caliptra Project.

"Read Only Memory", the code that is first executed when the chip is powered on. Normally the ROM is part of the silicon.

"First Mutable Code", the code that the boot ROM measures and jumps to after validation succeeds.

A high-level testing library for instantiating and manipulating models of the hardware. Intended to target multiple backends, including sw-emulator, verilator, and (hopefully) a future FPGA implementation.

Fast software-based simulation of the Caliptra hardware. This is the fastest and easiest way to test changes to firmware, but fidelity may not be perfect.

A rust library containing drivers for the Caliptra hardware, intended to be used by firmware running on Caliptra's RISC-V cpu.

Building / Testing

To build Caliptra firmware or tools, you need a Linux installation with a recent Rust toolchain. See Getting started with Rust for more information on installing an up-to-date Rust toolchain. We use version 1.70 of the Rust toolchain for all continuous integration.

Checkout and build

git clone https://github.com/chipsalliance/caliptra-sw \
    --config submodule.recurse=true \
    --recurse-submodules=dpe
cd caliptra-sw
cargo build

Testing in a hurry

To run all unit tests on the host cpu, and run all integration tests against the sw-emulator:

# (from caliptra-sw/)
cargo test

To run a single emulator test:

cargo test -p caliptra-drivers test_doe

You may wish to get a primitive trace from the sw-emulator while running the test:

$ CPTRA_TRACE_PATH=/tmp/trace.txt cargo test -p caliptra-drivers test_doe
$ cat /tmp/trace.txt
<snip>
pc=0xf6
pc=0xf8
UC write4 *0x50002290 <- 0xffffffff
pc=0xfa
pc=0xb2
pc=0xb6
UC read1 *0x500022b5 -> 0xff
pc=0xba
<snip>

Testing against Verilator

We use Verilator to provides a high-fidelity simulation based on Caliptra's RTL. Running tests in this environment can reveal bugs in the firmware, hardware, and the integration between the two.

If you don't have verilator 5.004 or later installed, follow these directions.

To run all the tests in verilator (this will take several hours):

cargo test --features=verilator --release

Sometimes you may only want to run a single test, like this pcrbank driver test (hosted by the driver integration tests) that can run in seconds:

cargo test --features=verilator -p caliptra-drivers test_pcrbank

To get a VCD dump of ALL waveforms while running the test:

CPTRA_TRACE_PATH=/tmp/trace.vcd cargo test --features=verilator -p caliptra-drivers test_pcrbank

You can open the vcd file with a tool like GTKWave to debug the hardware/firmware.

caliptra-sw's People

Contributors

korran avatar mhatrevi avatar bluegate010 avatar rusty1968 avatar sree-revoori1 avatar vsonims avatar jhand2 avatar nquarton avatar jlmahowa-amd avatar arthurheymans avatar vmhatre avatar github-actions[bot] avatar satyamsetti avatar wmaroneamd avatar fdamato avatar ajisaxena avatar rkr35 avatar benjamindoron avatar ferralcoder avatar zhalvorsen avatar ericeilertson avatar attzonko avatar andreslagarcavilla avatar leongross avatar amd-isaac avatar jameszhang-nvidia avatar sphinxc0re avatar srinathshiv avatar steven-bellock avatar premalathak12 avatar

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