jinghang / rare

Build your own Riscv Emulator in Rust.

Rare: Rust A Riscv Emulator

RISC-V 模拟器教程

This tutorial is based on Asami's excellent tutorial. Although the author haven't finished it, she have already separated the code into 10 stages, which makes this tutorial become possible.

When you complete this tutorial, the emulator is able to run xv6, a UNIX-like operation system running on RISC-V.

I am planning to follow her code to build the emulator step by step. When finished, I will write a complete tutorial to help reader to get the details. My tutorial will use the same tool mdbook as the original author, to build.

• Project: Github Rare
• Tutorial: Github.io Rare

Prerequisite

This tutorial assumes readers already have been familiar with Rust and RISC-V. If not, you might want to read the following materials to learn about RISC-V.

• RISC-V Specifications
• RISC-V Reader
• 手把手教你设计RISC-V处理器

For Rust, you can read the book after you have installed the toolchain. Open your terminal and type rustup docs, your browser will open a new page for you to navigate to the book and other docs.

Develop envrionment

• Linux / WSL

We need the clang toolchain to generate some files used in testing. You can download the precompiled version from here. The version I used is clang-12.

How to use

• clone this project
• use cd Rare/book && mdbook serve to open this tutorial locally
• use git pull to update when needed

Catelogue

1. Adder 加法器
2. Memory and Bus 内存和总线
3. Control Status Register 控制状态寄存器
4. Privilege Mode 特权模式
5. Exception 异常
6. PLIC & CLINT
7. UART
8. Interrupt 中断
9. Virtio
10. Page Table 页表

The original author separate the tutorial into two parts: Hardware and ISA. I have merged them here.

Note

When you travel through this tutorial, sometimes, you may notice some code in current chapter is different from last one's. This is because I will do some refactor when needed. Welcome to open an issue on github if you have any questions.