jefftenney / lptim-tick-u5

FreeRTOS Tick/Tickless via LPTIM for STM32U

LPTIM-Tick-U5

FreeRTOS Tick/Tickless via LPTIM in STM32U

Use LPTIM for the FreeRTOS tick instead of the SysTick Timer for ultra-low-power applications.

• No drift or slippage in kernel time
• Use STOP modes even while FreeRTOS timers are running or delays are underway
• For any STM32 with LPTIM (see LPTIM-Tick)

This repository demonstrates adaptation of the lptimTick.c gist to the STM32U series MCUs. The specific target platform is the ST B-U585I-IOT02A (STM32U585). The project uses STM32CubeIDE and its integrated code-generation tool (STM32CubeMX). However, lptimTick.c is compatible with any toolchain supported by FreeRTOS.

For a thorough evaluation, this project can be built without tickless idle, with the default tickless idle, or with the custom tickless idle provided by lptimTick.c. See branches for additional evaluation options.

---

B-U585I-IOT02A Demo

Press the blue button to cycle between tests:

1. Maintain kernel time only. LED blinks every 5 seconds.
2. Validate tick timing. LED blinks every 2 seconds.
3. Stress test tick timing. LED blinks every second.

Tests 2 and 3 display live test results to a serial terminal. Connect to the STLink Virtual COM Port at 115200 8N1. Additionally, the LED blinks twice (instead of just once) in case of test failure.

Test Results

Current readings shown are averages, not including the LED

With lptimTick.c (configUSE_TICKLESS_IDLE 2)

• Test 1: 9μA, no drift
• Test 2: 35μA, no drift
• Test 3: 57μA, no drift

Default tickless idle (configUSE_TICKLESS_IDLE 1)

• Test 1: 0.49mA, trivial drift
• Test 2: 0.50mA, trivial drift
• Test 3: 0.51mA, trivial drift (with kernel v10.5.1 or newer)

Tickless disabled (configUSE_TICKLESS_IDLE 0)

• Test 1: 1.21mA, no drift
• Test 2: 1.21mA, no drift
• Test 3: 1.21mA, no drift

lptim-tick-u5's Issues

'RCC_CSR_LSIRDY' undeclared (first use in this function)

When trying to compile with LSI clock on STM32U585 the following error occurs: 'RCC_CSR_LSIRDY' undeclared (first use in this function)

129#ifdef configTICK_USES_LSI
130  #define LPTIMSEL_Val 1 // LSI
131   #define IS_REF_CLOCK_READY() (RCC->CSR & RCC_CSR_LSIRDY)

looking up for STM32U5 reference design seems like there is no such a bit.

What is the usage of LPTIM3?

I was looking at the implementation more deeply and I can see that you used LPTIM1 for tickless mode. Then I found that LPTIM3 is also enabled in the IOC. But I don't find any use of it.

Power Consumption is more than 5ma if system clock is made to 160MHz

I have been testing this with STM32u575 board, it was working fine with 24mhz clock and consumption was around 850uA but when I changed the system clk to 160Mhz it just increased to 5ma-10ma.

Increasing the clock may result in higher power consumption. But this is a significant increase.

resolved by kernel PR59

I saw this comment in READ ME. I don't get it.
LED is blinking twice particularly in that case. That means error in default tickless mode. Are this comment and error related?