iob-axi's People
iob-axi's Issues
iob2axil + axil2iob adapters: iverilog simulation gets stuck
Issue
- When a system with
iob2axil
connected to aaxil2iob
adapter is simulated usingiverilog
, the simulation gets stuck after the first access to these adapters.
Minimal Example
- I've created a simple example in my fork: check this commit and it's commit message for more details.
- The testbench has the following configuration:
IOb signals <-> | iob2axil | <- AXI Lite signals -> | axil2iob | <- IOb signals -> | iob_ram |
- Clone fresh repository:
git clone [email protected]:P-Miranda/iob-axi.git --branch iob-axil-issue --recursive
cd iob-axi
- Or add my remote to existing working repository:
git remote add pmiranda [email protected]:P-Miranda/iob-axi.git
git fetch --all
git checkout pmiranda/iob-axil-issue
- Run simulation:
make sim MODULE_NAME=iob2axil
- Note: The simulation will not finish, you have to manualy stop it.
- You can check the waves in
gtkwave
:
gtkwave uut.vcd hardware/iob2axil/iob2axil_tb.gtkw &
Other tests
- I've tried to simulate using
iverilog
versions 10.3 (the one that we usually use) and the latest commit from the 11.0 branch- both had the same behaviour: simulation gets stuck but does not give errors or warnings
- Running the simulation in
xmsim
there are no warnings or errors, but the simulation runs as expected until the end
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