This repo contains a set of analog standard cells designed for the "Skywater 130nm" fabrication process available at the Google Skywater foundry (formerly Cypress Semiconductor).
- Make Cells
- Automate PDK Elaboration
- Document Cells:
- Categorize (
libs.ref/sky130_hilas_sc/CELL_INDEX.md
) - Provide descriptions (
libs.ref/sky130_hilas_sc/CELL_INDEX.md
) - Review generated Markdown to verify PORT/PIN status of all cells
- Create schematic representation (.png format) of major cells in
libs.ref/sky130_hilas_sc/schem/
- Categorize (
- Make Verilog-A models of major cells
These cells are meant to be used in the openLANE/openROAD toolchains in order to create GDSII files for fabrication. A custom version of the OpenLANE flow that we're calling "fastlane" is available on gitlab.com (direct repo link). Fastlane uses git submodules to include this repository, so it's probably a better idea to start by taking a look at the Fastlane Page
- Run
make check
to run checks on elaborated PDK. - Run
make clean
to remove all auto-generated collateral. - Run
make
to (re)build all auto-generated collateral. - Run
scripts/magic_gen.py --help
for details on how to use the automation.
Net Name | Description |
---|---|
VPWR |
normal supply 1.8V (analog 1.8V) |
VGND |
reference 0 |
VINJ |
Supply for Injection for FG devices. (run time: 1.8V, programming: 1.8-6.0V) |
VTUN |
Tunnelling input for FG devices. (run time: 0 or 1.8V, programming: 11-12V) |
Block Name | Description |
---|---|
sky130_hilas_DAC5bit01 |
5-bit digital-to-analog converter (under 6.05um at the moment; thinking through expansion to 6bit and 7bit, and they would use this cell |
sky130_hilas_FGBias2x1cell |
|
sky130_hilas_FGBiasWeakGate2x1cell |
2x1 array of FG switch cells configured as pFET current sources with weak capacitive gate inputs |
sky130_hilas_FGtrans2x1cell |
|
sky130_hilas_LevelShift4InputUp |
4-channel level shifter |
sky130_hilas_StepUpDigital |
a single level shifter |
sky130_hilas_TA2Cell_1FG |
Two transimpedance amps with one (of two) amplifiers using floating-gate |
inputs. FG amplifier with wide linear range. | |
sky130_hilas_TA2Cell_1FG_Strong |
Two transimpedance amps with one (of two) amplifiers using floating-gate inputs. FG amplifier with normal linear range. |
sky130_hilas_TA2Cell_NoFG |
Two transimpedane amplifiers with no floating-gate inputs. |
sky130_hilas_TA2SignalBiasCell |
|
sky130_hilas_Tgate4Double01 |
4 double-throw transmission gates |
sky130_hilas_Tgate4Single01 |
4 single-throw transmission gates |
sky130_hilas_TopLevelTextStructure |
top level test structure |
sky130_hilas_TopProtectStructure |
top level test structure with protection (duplicate of TopLevelProtectStructure) |
sky130_hilas_Trans4small |
3 small nFETs + 3 small pFETs |
sky130_hilas_VinjDecode2to4 |
a 2-to-4 decoder capable of handling VINJ voltage |
sky130_hilas_VinjDiodeProtect01 |
protective ESD diode for VINJ line |
sky130_hilas_VinjInv2 |
logical inverter for VINJ-level voltages |
sky130_hilas_VinjNOR3 |
3-input NOR gate capable of VING voltage |
sky130_hilas_WTA4Stage01 |
4-input winner-take-all circuit. Connects directly to array of swc4x2cell. Can array vertically. Needs one nFET transistor current source. |
sky130_hilas_capacitorArray01 |
selectable capacitor array |
sky130_hilas_capacitorSize01 |
smallest cap |
sky130_hilas_capacitorSize02 |
mid-small cap |
sky130_hilas_capacitorSize03 |
mid-large cap |
sky130_hilas_capacitorSize04 |
large cap |
sky130_hilas_cellAttempt01 |
4x1 array of FG switch cell, Varactor capacitor cell |
sky130_hilas_drainSelect01 |
multiplexor for drain selection for 4 drain lines, pitch matched |
sky130_hilas_nFETLarge |
Single Large (W//L=100) nFET Transistor |
sky130_hilas_pFETLarge |
Single Large (W/L=100) pFET Transistor |
sky130_hilas_pFETmed |
Medium-sized (W/L=10) pFET transistor |
sky130_hilas_polyresistorGND |
protective current-limiting resistor to ground |
sky130_hilas_swc4x1BiasCell |
4x1 array of FG switch cell configured pFET as current sources |
sky130_hilas_swc4x1cellOverlap |
4x1 array of FG switch cell using overlap capacitors |
sky130_hilas_swc4x1cellOverlap2 |
4x1 analog mux with overlap |
sky130_hilas_swc4x2cell |
4x2 array of FG switch cell, Varactor capacitor cell |
sky130_hilas_swc4x2cellOverlap |
Core switch cell, built with overlap capacitor |
Block Name | Description |
---|---|
sky130_hilas_FGcharacterization01 |
FG test strucure that uses a capacitor around a transconductance amplifier |
Description: 5-bit digital-to-analog converter (under 6.05um at the moment; thinking through expansion to 6bit and 7bit, and they would use this cell
Height: 5.990
Width: 16.580
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | A0 | metal2 | nsew,analog,default |
2 | A1 | metal2 | nsew,analog,default |
3 | A2 | metal2 | nsew,analog,default |
4 | A3 | metal2 | nsew,analog,default |
5 | A4 | metal2 | nsew,analog,default |
6 | VPWR | metal2 | nsew,analog,default |
7 | OUT | metal1 | nsew,analog,default |
Description: None
Height: 6.930
Width: 11.530
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VTUN | metal1 | nsew,analog,default |
2 | VGND | metal1 | nsew,ground,default |
4 | GATE_CONTROL | metal1 | nsew,analog,default |
5 | DRAIN1 | metal2 | nsew,analog,default |
6 | DRAIN4 | metal2 | nsew,analog,default |
8 | OUTPUT1 | metal2 | nsew,analog,default |
9 | OUTPUT2 | metal2 | nsew,analog,default |
10 | GATECOL | metal1 | nsew |
11 | VINJ | metal1 | nsew |
Description: 2x1 array of FG switch cells configured as pFET current sources with weak capacitive gate inputs
Height: 6.150
Width: 11.530
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | DRAIN1 | metal2 | nsew,analog,default |
2 | VIN11 | metal2 | nsew |
3 | ROW1 | metal2 | nsew,analog,default |
4 | ROW2 | metal2 | nsew,analog,default |
5 | VINJ | metal1 | nsew,power,default |
6 | COLSEL1 | metal1 | nsew,analog,default |
7 | VGND | metal1 | nsew,ground,default |
9 | VTUN | metal1 | nsew,analog,default |
10 | GATE1 | metal1 | nsew,analog,default |
11 | DRAIN2 | metal2 | nsew,analog,default |
12 | VIN12 | metal2 | nsew,analog,default |
13 | COMMONSOURCE | metal2 | nsew,analog,default |
Description: None
Height: 6.150
Width: 11.520
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | COLSEL1 | metal1 | nsew,analog,default |
2 | VINJ | metal1 | nsew,analog,default |
3 | DRAIN1 | metal2 | nsew,analog,default |
4 | DRAIN2 | metal2 | nsew,analog,default |
5 | PROG | metal1 | nsew,analog,default |
6 | RUN | metal1 | nsew,analog,default |
7 | VIN2 | metal1 | nsew,analog,default |
8 | VIN1 | metal1 | nsew,analog,default |
9 | GATE1 | metal1 | nsew,analog,default |
10 | VGND | metal1 | nsew,ground,default |
11 | VTUN | metal1 | nsew,analog,default |
16 | COL1 | metal2 | nsew |
17 | ROW1 | metal2 | nsew |
18 | ROW2 | metal2 | nsew |
Description: 4-channel level shifter
Height: 7.000
Width: 8.700
Port Number | Label | Layer | Attributes |
---|---|---|---|
5 | VPWR | metal1 | nsew |
6 | VINJ | metal1 | nsew |
7 | OUTPUT1 | metal2 | nsew |
8 | OUTPUT2 | metal2 | nsew |
9 | OUTPUT3 | metal2 | nsew |
10 | OUTPUT4 | metal2 | nsew |
11 | VGND | metal1 | nsew |
12 | INPUT1 | metal2 | nsew |
13 | INPUT2 | metal2 | nsew |
14 | INPUT3 | metal2 | nsew |
15 | INPUT4 | metal2 | nsew |
Description: a single level shifter
Height: 1.750
Width: 8.700
Port Number | Label | Layer | Attributes |
---|
Description: Two transimpedance amps with one (of two) amplifiers using floating-gate inputs. FG amplifier with wide linear range.
Height: 6.930
Width: 28.090
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VIN12 | metal2 | nsew,analog,default |
2 | VIN11 | metal2 | nsew,analog,default |
3 | VIN21 | metal2 | nsew,analog,default |
4 | VIN22 | metal2 | n,analog,default |
6 | VPWR | metal1 | nsew,power,default |
7 | VGND | metal1 | nsew |
8 | VINJ | metal1 | nsew |
9 | OUTPUT1 | metal2 | nsew,analog,default |
10 | OUTPUT2 | metal2 | nsew,analog,default |
11 | DRAIN1 | metal2 | nsew |
12 | DRAIN2 | metal2 | nsew |
13 | COLSEL2 | metal1 | nsew |
14 | GATE2 | metal1 | nsew |
15 | GATE1 | metal1 | nsew |
16 | COLSEL1 | metal1 | nsew |
17 | VTUN | metal1 | nsew |
Description: Two transimpedance amps with one (of two) amplifiers using floating-gate inputs. FG amplifier with normal linear range.
Height: 6.930
Width: 28.100
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VTUN | metal1 | nsew |
3 | PROG | metal1 | nsew |
4 | GATE1 | metal1 | nsew |
5 | VIN11 | metal1 | nsew |
6 | VINJ | metal1 | nsew |
8 | VIN22 | metal2 | n |
9 | VIN21 | metal2 | nsew |
10 | VPWR | metal1 | nsew |
11 | VGND | metal1 | nsew |
12 | OUTPUT2 | metal2 | nsew |
13 | OUTPUT1 | metal2 | nsew |
14 | GATESEL1 | metal1 | nsew |
15 | GATESEL2 | metal1 | nsew |
16 | DRAIN1 | metal2 | nsew |
17 | DRAIN2 | metal2 | nsew |
18 | VIN12 | metal1 | nsew |
19 | GATE2 | metal1 | nsew |
20 | RUN | metal1 | nsew |
Description: Two transimpedane amplifiers with no floating-gate inputs.
Height: 6.930
Width: 17.920
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | COLSEL1 | metal1 | nsew |
2 | VIN12 | metal2 | nsew,analog,default |
3 | VIN21 | metal2 | nsew |
4 | VIN22 | metal2 | nsew |
5 | OUTPUT1 | metal2 | nsew |
6 | OUTPUT2 | metal2 | nsew |
7 | VGND | metal1 | nsew,ground,default |
8 | VPWR | metal1 | nsew,power,default |
9 | DRAIN1 | metal2 | nsew |
10 | DRAIN2 | metal2 | nsew |
11 | VTUN | metal1 | nsew |
12 | GATE1 | metal1 | nsew |
13 | VINJ | metal1 | nsew |
14 | VIN11 | metal2 | nsew |
Description: None
Height: 6.050
Width: 8.880
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VOUT_AMP2 | metal2 | nsew,analog,default |
2 | VOUT_AMP1 | metal2 | nsew,analog,default |
3 | VGND | metal1 | nsew,ground,default |
4 | VPWR | metal2 | nsew,power,default |
5 | VIN22 | metal2 | nsew,analog,default |
6 | VIN21 | metal2 | nsew,analog,default |
7 | VIN11 | metal2 | nsew,analog,default |
8 | VIN12 | metal2 | nsew,analog,default |
9 | VBIAS2 | metal2 | nsew,analog,default |
10 | VBIAS1 | metal2 | nsew,analog,default |
Description: 4 double-throw transmission gates
Height: 6.050
Width: 7.080
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VGND | metal1 | nsew |
2 | INPUT1_1 | metal2 | nsew |
4 | SELECT1 | metal2 | nsew |
5 | SELECT2 | metal2 | nsew |
6 | INPUT2_2 | metal2 | nsew |
7 | INPUT1_2 | metal2 | nsew |
8 | SELECT3 | metal2 | nsew |
9 | INPUT2_3 | metal2 | nsew |
10 | SELECT4 | metal2 | nsew |
11 | INPUT2_4 | metal2 | nsew |
12 | INPUT1_4 | metal2 | nsew |
13 | VPWR | metal1 | nsew |
14 | OUTPUT4 | metal2 | nsew |
15 | OUTPUT3 | metal2 | nsew |
16 | OUTPUT2 | metal2 | nsew |
17 | OUTPUT1 | metal2 | nsew |
18 | INPUT2_1 | metal2 | nsew |
19 | INPUT1_3 | metal2 | nsew |
Description: 4 single-throw transmission gates
Height: 6.410
Width: 4.760
Port Number | Label | Layer | Attributes |
---|---|---|---|
2 | VPWR | metal1 | nsew,power,default |
6 | INPUT1_2 | metal2 | nsew,analog,default |
7 | SELECT2 | metal2 | nsew,analog,default |
10 | VGND | metal1 | nsew,ground,default |
12 | OUTPUT2 | metal2 | nsew,analog,default |
14 | OUTPUT4 | metal2 | nsew |
15 | OUTPUT3 | metal2 | nsew |
16 | OUTPUT1 | metal2 | nsew |
17 | INPUT1_4 | metal2 | nsew |
18 | SELECT4 | metal2 | nsew |
19 | SELECT3 | metal2 | nsew |
20 | INPUT1_3 | metal2 | nsew |
21 | SELECT1 | metal2 | nsew |
22 | INPUT1_1 | metal2 | nsew |
Description: top level test structure
Height: 75.780
Width: 130.250
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | DIG24 | metal2 | n |
2 | DIG23 | metal2 | nsew |
3 | DIG22 | metal2 | nsew |
4 | DIG21 | metal2 | nsew |
5 | DIG29 | metal2 | nsew |
6 | DIG28 | metal2 | nsew |
7 | DIG27 | metal2 | nsew |
8 | DIG26 | metal2 | nsew |
9 | DIG25 | metal2 | nsew |
10 | DIG20 | metal2 | nsew |
11 | DIG19 | metal2 | nsew |
12 | DIG18 | metal2 | nsew |
13 | DIG17 | metal2 | nsew |
14 | DIG16 | metal2 | nsew |
15 | DIG15 | metal2 | nsew |
16 | DIG14 | metal2 | nsew |
17 | DIG13 | metal2 | nsew |
18 | DIG12 | metal2 | nsew |
19 | DIG11 | metal2 | nsew |
20 | DIG10 | metal2 | nsew |
21 | DIG09 | metal2 | nsew |
22 | DIG08 | metal2 | nsew |
23 | DIG07 | metal2 | nsew |
24 | DIG06 | metal2 | nsew |
25 | DIG05 | metal2 | nsew |
26 | DIG04 | metal2 | nsew |
27 | DIG03 | metal2 | nsew |
28 | DIG02 | metal2 | nsew |
29 | DIG01 | metal2 | nsew |
30 | CAP2 | metal2 | nsew |
31 | GENERALGATE01 | metal2 | nsew |
32 | GATEANDCAP1 | metal2 | nsew |
33 | GENERALGATE02 | metal2 | nsew |
34 | OUTPUTTA1 | metal2 | nsew |
35 | GATENFET1 | metal2 | nsew |
36 | DACOUTPUT | metal2 | nsew |
37 | DRAINOUT | metal2 | nsew |
38 | ROWTERM2 | metal2 | nsew |
39 | COLUMN2 | metal2 | nsew |
40 | COLUMN1 | metal2 | nsew |
41 | GATE2 | metal1 | nsew |
42 | DRAININJECT | metal1 | nsew |
43 | VTUN | metal1 | nsew |
44 | VREFCHAR | metal2 | nsew |
45 | CHAROUTPUT | metal2 | nsew |
46 | LARGECAPACITOR | metal2 | nsew |
47 | DRAIN6N | metal2 | nsew |
48 | DRAIN6P | metal2 | nsew |
49 | DRAIN5P | metal2 | nsew |
50 | DARIN4P | metal2 | nsew |
51 | DRAIN5N | metal2 | nsew |
52 | DRAIN4N | metal2 | nsew |
53 | DRAIN3P | metal2 | nsew |
54 | DRAIN2P | metal2 | nsew |
55 | DRAIN1P | metal2 | nsew |
56 | DRAIN3N | metal2 | nsew |
57 | DRAIN2N | metal2 | nsew |
58 | DRAIN1N | metal2 | nsew |
59 | SOURCEN | metal2 | nsew |
60 | SOURCEP | metal2 | nsew |
61 | GATE1 | metal1 | nsew |
62 | VINJ | metal1 | nsew |
63 | VGND | metal1 | nsew |
64 | VPWR | metal1 | nsew |
Description: top level test structure with protection (duplicate of TopLevelProtectStructure)
Height: 389.100
Width: 372.850
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | IO07 | metal1 | nsew |
2 | IO08 | metal1 | nsew |
3 | IO09 | metal1 | nsew |
4 | IO10 | metal1 | nsew |
5 | IO11 | metal1 | nsew |
6 | IO12 | metal1 | nsew |
7 | IO13 | metal1 | nsew |
8 | IO25 | metal1 | nsew |
9 | IO26 | metal1 | nsew |
10 | IO27 | metal1 | nsew |
11 | IO28 | metal1 | nsew |
12 | IO29 | metal1 | nsew |
13 | IO30 | metal1 | nsew |
14 | IO31 | metal1 | nsew |
15 | IO32 | metal1 | nsew |
16 | IO33 | metal1 | nsew |
17 | IO34 | metal1 | nsew |
18 | IO35 | metal1 | nsew |
19 | IO36 | metal1 | nsew |
20 | IO37 | metal1 | nsew |
22 | ANALOG10 | metal1 | nsew |
23 | ANALOG09 | metal1 | nsew |
24 | ANALOG08 | metal1 | nsew |
25 | ANALOG07 | metal1 | nsew |
26 | ANALOG06 | metal1 | nsew |
27 | ANALOG05 | metal1 | nsew |
28 | ANALOG04 | metal1 | nsew |
29 | ANALOG03 | metal1 | nsew |
30 | ANALOG02 | metal1 | nsew |
31 | ANALOG01 | metal1 | nsew |
32 | ANALOG00 | metal1 | nsew |
33 | VSSA1 | metal2 | nsew |
34 | VDDA1 | metal2 | nsew |
35 | LADATAOUT01 | metal2 | nsew |
36 | LADATAOUT00 | metal2 | nsew |
37 | LADATAOUT02 | metal2 | nsew |
38 | LADATAOUT03 | metal2 | nsew |
39 | LADATAOUT04 | metal2 | nsew |
40 | LADATAOUT05 | metal2 | nsew |
41 | LADATAOUT06 | metal2 | nsew |
42 | LADATAOUT07 | metal2 | nsew |
43 | LADATAOUT08 | metal2 | nsew |
44 | LADATAOUT09 | metal2 | nsew |
45 | LADATAOUT10 | metal2 | nsew |
46 | LADATAOUT11 | metal2 | nsew |
47 | LADATAOUT12 | metal2 | nsew |
48 | LADATAOUT13 | metal2 | nsew |
49 | LADATAOUT14 | metal2 | nsew |
50 | LADATAOUT15 | metal2 | nsew |
51 | LADATA16 | metal2 | nsew |
52 | LADATAOUT17 | metal2 | nsew |
53 | LADATAOUT18 | metal2 | nsew |
54 | LADATAOUT19 | metal2 | nsew |
55 | LADATAOUT20 | metal2 | nsew |
56 | LADATAOUT21 | metal2 | nsew |
57 | LADATAOUT22 | metal2 | nsew |
58 | LADATAOUT23 | metal2 | nsew |
59 | LADATAOUT24 | metal2 | nsew |
60 | LADATAIN00 | metal2 | nsew |
61 | LADATAIN01 | metal2 | nsew |
62 | LADATAIN02 | metal2 | nsew |
63 | LADATAIN03 | metal2 | nsew |
64 | VCCA | metal2 | nsew |
Description: 3 small nFETs + 3 small pFETs
Height: 6.050
Width: 2.800
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | NFET_SOURCE1 | metal2 | nsew,analog,default |
2 | NFET_GATE1 | metal2 | nsew,analog,default |
3 | NFET_SOURCE2 | metal2 | nsew,analog,default |
4 | NFET_GATE2 | metal2 | nsew,analog,default |
5 | NFET_SOURCE3 | metal2 | nsew,analog,default |
6 | NFET_GATE3 | metal2 | nsew,analog,default |
7 | PFET_SOURCE1 | metal2 | nsew,analog,default |
8 | PFET_GATE1 | metal2 | nsew,analog,default |
9 | PFET_SOURCE2 | metal2 | nsew,analog,default |
10 | PFET_GATE2 | metal2 | nsew,analog,default |
11 | PFET_SOURCE3 | metal2 | nsew,analog,default |
12 | PFET_GATE3 | metal2 | nsew,analog,default |
13 | WELL | metal1 | nsew,ground,default |
14 | VGND | metal1 | nsew,power,default |
15 | PFET_DRAIN3 | metal2 | nsew,analog,default |
16 | PFET_DRAIN2 | metal2 | nsew,analog,default |
17 | PFET_DRAIN1 | metal2 | nsew,analog,default |
18 | NFET_DRAIN3 | metal2 | nsew,analog,default |
19 | NFET_DRAIN2 | metal2 | nsew,analog,default |
20 | NFET_DRAIN1 | metal2 | nsew,analog,default |
Description: a 2-to-4 decoder capable of handling VINJ voltage
Height: 6.160
Width: 12.950
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | OUTPUT00 | metal2 | nsew |
2 | OUTPUT01 | metal2 | nsew |
3 | OUTPUT10 | metal2 | nsew |
4 | OUTPUT11 | metal2 | nsew |
5 | VGND | metal1 | nsew |
6 | VINJ | metal1 | nsew |
7 | IN2 | metal2 | nsew |
8 | IN1 | metal2 | nsew |
9 | ENABLE | metal2 | nsew |
Description: protective ESD diode for VINJ line
Height: 10.870
Width: 28.590
Port Number | Label | Layer | Attributes |
---|---|---|---|
2 | OUTPUT | metal1 | nsew |
3 | VGND | metal1 | nsew |
4 | VINJ | metal2 | nsew |
5 | INPUT | metal1 | nsew |
Description: logical inverter for VINJ-level voltages
Height: 1.640
Width: 3.610
Port Number | Label | Layer | Attributes |
---|
Description: 3-input NOR gate capable of VING voltage
Height: 1.640
Width: 6.880
Port Number | Label | Layer | Attributes |
---|
Description: 4-input winner-take-all circuit. Connects directly to array of swc4x2cell. Can array vertically. Needs one nFET transistor current source.
Height: 6.500
Width: 14.170
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VGND | metal1 | nsew,ground,default |
4 | OUTPUT1 | metal2 | nsew,analog,default |
5 | OUTPUT2 | metal2 | nsew,analog,default |
6 | OUTPUT3 | metal2 | nsew,analog,default |
7 | OUTPUT4 | metal2 | nsew,analog,default |
8 | INPUT1 | metal2 | nsew,analog,default |
9 | INPUT2 | metal2 | nsew,analog,default |
10 | INPUT3 | metal2 | nsew,analog,default |
11 | INPUT4 | metal2 | nsew,analog,default |
12 | DRAIN1 | metal2 | nsew |
16 | GATE1 | metal1 | nsew |
17 | VTUN | metal1 | nsew |
18 | WTAMIDDLENODE | metal1 | nsew |
19 | COLSEL1 | metal1 | nsew |
20 | VPWR | metal1 | nsew |
21 | VINJ | metal1 | nsew |
22 | DRAIN2 | metal2 | nsew |
23 | DRAIN3 | metal2 | nsew |
24 | DRAIN4 | metal2 | nsew |
Description: selectable capacitor array
Height: 6.500
Width: 36.700
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | CAPTERM2 | metal2 | nsew,analog,default |
2 | CAPTERM1 | metal2 | nsew,analog,default |
3 | VINJ | metal1 | nsew,power,default |
4 | GATESELECT | metal1 | nsew |
5 | VTUN | metal1 | nsew |
6 | GATE | metal1 | nsew |
7 | DRAIN2 | metal2 | nsew |
8 | DRAIN1 | metal2 | nsew |
10 | DRAIN4 | metal2 | nsew |
11 | DRAIN3 | metal2 | nsew |
12 | VGND | metal1 | nsew |
Description: smallest cap
Height: 5.830
Width: 10.420
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | CAPTERM02 | metal2 | nsew,analog,default |
2 | CAPTERM01 | metal2 | nsew,analog,default |
Description: mid-small cap
Height: 5.830
Width: 7.970
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | CAPTERM02 | metal2 | nsew,analog,default |
2 | CAPTERM01 | metal2 | nsew,analog,default |
Description: mid-large cap
Height: 5.870
Width: 5.790
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | CAPTERM02 | metal2 | nsew,analog,default |
2 | CAPTERM01 | metal2 | nsew,analog,default |
Description: large cap
Height: 5.290
Width: 5.780
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | CAP1TERM02 | metal2 | nsew,analog,default |
2 | CAP2TERM02 | metal2 | nsew,analog,default |
3 | CAP2TERM01 | metal2 | nsew,analog,default |
4 | CAP1TERM01 | metal2 | nsew,analog,default |
Description: 4x1 array of FG switch cell, Varactor capacitor cell
Height: 6.500
Width: 10.070
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VTUN | metal1 | nsew |
2 | VINJ | metal1 | nsew |
3 | COLSEL1 | metal1 | nsew |
4 | COL1 | metal1 | nsew |
5 | GATE1 | metal1 | nsew |
11 | ROW4 | metal2 | nsew |
14 | VGND | metal1 | nsew |
15 | DRAIN4 | metal2 | nsew |
16 | DRAIN1 | metal2 | nsew |
17 | ROW1 | metal2 | nsew |
18 | ROW3 | metal2 | nsew |
19 | DRAIN3 | metal2 | nsew |
20 | DRAIN2 | metal2 | nsew |
21 | ROW2 | metal2 | nsew |
Description: multiplexor for drain selection for 4 drain lines, pitch matched
Height: 6.590
Width: 5.720
Port Number | Label | Layer | Attributes |
---|---|---|---|
2 | DRAIN3 | metal2 | nsew |
3 | DRAIN2 | space | nsew,analog,default |
9 | VINJ | metal1 | nsew,power,default |
10 | DRAIN_MUX | metal1 | nsew,analog,default |
11 | VGND | metal1 | nsew,ground,default |
14 | SELECT2 | metal2 | nsew |
15 | SELECT1 | metal2 | nsew |
16 | SELECT3 | metal2 | nsew |
17 | SELECT4 | metal2 | nsew |
Description: Single Large (W//L=100) nFET Transistor
Height: 5.830
Width: 4.370
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | GATE | metal2 | nsew,analog,default |
2 | SOURCE | metal2 | nsew,analog,default |
3 | DRAIN | metal2 | nsew,analog,default |
4 | VGND | metal1 | nsew |
Description: Single Large (W/L=100) pFET Transistor
Height: 5.990
Width: 4.640
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | GATE | metal2 | nsew |
2 | SOURCE | metal2 | nsew,analog,default |
3 | DRAIN | metal2 | nsew,analog,default |
4 | WELL | metal1 | nsew,analog,default |
Description: Medium-sized (W/L=10) pFET transistor
Height: 2.870
Width: 1.190
Port Number | Label | Layer | Attributes |
---|
Description: protective current-limiting resistor to ground
Height: 10.890
Width: 55.470
Port Number | Label | Layer | Attributes |
---|---|---|---|
2 | INPUT | metal1 | nsew |
3 | OUTPUT | metal1 | nsew |
4 | VGND | metal1 | nsew |
Description: 4x1 array of FG switch cell configured pFET as current sources
Height: 6.500
Width: 10.080
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | ROW1 | space | nsew |
2 | ROW2 | metal2 | nsew |
3 | ROW3 | metal2 | nsew |
4 | ROW4 | metal2 | nsew |
5 | VTUN | metal1 | nsew,analog,default |
6 | GATE1 | metal1 | nsew,analog,default |
7 | VINJ | metal1 | nsew,power,default |
8 | VPWR | metal1 | nsew,power,default |
9 | COLSEL1 | metal1 | nsew,analog,default |
18 | VGND | metal1 | nsew |
19 | DRAIN3 | metal2 | nsew |
20 | DRAIN4 | metal2 | nsew |
21 | DRAIN1 | metal2 | nsew |
22 | DRAIN2 | metal2 | nsew |
Description: 4x1 array of FG switch cell using overlap capacitors
Height: 6.710
Width: 10.080
Port Number | Label | Layer | Attributes |
---|
Description: 4x1 analog mux with overlap
Height: 6.160
Width: 9.350
Port Number | Label | Layer | Attributes |
---|
Description: 4x2 array of FG switch cell, Varactor capacitor cell
Height: 6.500
Width: 20.120
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | GATE2 | metal1 | nsew,analog,default |
2 | VTUN | metal1 | nsew,power,default |
3 | GATE1 | metal1 | nsew,analog,default |
6 | VINJ | metal1 | nsew,power,default |
10 | GATESELECT1 | metal1 | nsew,analog,default |
11 | GATESELECT2 | metal1 | nsew,analog,default |
12 | COL1 | metal1 | nsew,analog,default |
13 | COL2 | metal1 | nsew,analog,default |
14 | ROW1 | metal2 | nsew |
15 | ROW2 | metal2 | nsew |
16 | DRAIN1 | metal2 | nsew |
17 | DRAIN2 | metal2 | nsew |
18 | DRAIN3 | metal2 | nsew |
19 | ROW3 | metal2 | nsew |
20 | ROW4 | metal2 | nsew |
21 | DRAIN4 | metal2 | nsew |
22 | VGND | metal1 | nsew |
Description: Core switch cell, built with overlap capacitor
Height: 6.160
Width: 17.980
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VERT1 | metal1 | nsew,analog,default |
2 | HORIZ1 | metal2 | nsew,analog,default |
3 | DRAIN1 | metal2 | nsew,analog,default |
4 | HORIZ2 | metal2 | nsew,analog,default |
5 | DRAIN2 | metal2 | nsew,analog,default |
6 | DRAIN3 | metal2 | nsew,analog,default |
7 | HORIZ3 | metal2 | nsew,analog,default |
8 | HORIZ4 | metal2 | nsew,analog,default |
9 | DRAIN4 | metal2 | nsew,analog,default |
10 | VINJ | metal1 | nsew,power,default |
11 | GATESELECT1 | metal1 | nsew,analog,default |
12 | VERT2 | metal1 | nsew,analog,default |
13 | GATESELECT2 | metal1 | nsew,analog,default |
14 | DRAIN | metal2 | nsew,analog,default |
15 | GATE2 | metal1 | nsew,analog,default |
16 | GATE1 | metal1 | nsew,analog,default |
17 | VTUN | metal1 | nsew,analog,default |
Description: None
Height: 2.860
Width: 2.840
Port Number | Label | Layer | Attributes |
---|
Description: primitive cap, variant 01a
Height: 2.280
Width: 2.300
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.830
Width: 7.200
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.830
Width: 4.230
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.650
Width: 1.720
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.650
Width: 1.720
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.650
Width: 1.910
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.650
Width: 1.870
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 13.680
Width: 16.380
Port Number | Label | Layer | Attributes |
---|
Description: 2x1 array of transmission gates
Height: 6.150
Width: 5.680
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.790
Width: 3.270
Port Number | Label | Layer | Attributes |
---|
Description: one large varactor cap
Height: 5.990
Width: 10.290
Port Number | Label | Layer | Attributes |
---|
Description: varactor cap for floating-gate charge storage
Height: 1.860
Width: 2.230
Port Number | Label | Layer | Attributes |
---|
Description: variant 2, varactor cap for floating-gate charge storage
Height: 1.690
Width: 2.720
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.020
Width: 9.540
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 4.770
Width: 2.190
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 1.520
Width: 7.080
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 1.610
Width: 4.760
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 1.520
Width: 1.880
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 1.430
Width: 1.630
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 1.700
Width: 5.680
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 12.520
Width: 34.090
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 1.430
Width: 2.830
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 0.310
Width: 0.520
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 2.720
Width: 3.020
Port Number | Label | Layer | Attributes |
---|
Description: pairs of nFET current mirrors
Height: 2.750
Width: 1.660
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 4.770
Width: 4.670
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 1.290
Width: 1.840
Port Number | Label | Layer | Attributes |
---|
Description: pFET current mirror
Height: 2.030
Width: 2.190
Port Number | Label | Layer | Attributes |
---|
Description: second pFET current mirror
Height: 2.840
Width: 1.280
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 6.050
Width: 1.870
Port Number | Label | Layer | Attributes |
---|
Description: FG test strucure that uses a capacitor around a transconductance amplifier
Height: 6.050
Width: 29.950
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VTUN | metal1 | nsew,analog,default |
2 | GATE1 | metal1 | nsew,analog,default |
3 | GATE3 | metal1 | nsew,analog,default |
4 | VTUNOVERLAP01 | metal1 | nsew,analog,default |
5 | GATE2 | metal1 | nsew,analog,default |
6 | GATE4 | metal1 | nsew,analog,default |
7 | LARGECAPACITOR | metal1 | nsew,analog,default |
8 | VGND | metal2 | nsew,ground,default |
9 | VINJ | metal2 | nsew,power,default |
10 | OUTPUT | metal2 | nsew,analog,default |
11 | VREF | metal2 | nsew,analog,default |
12 | VBIAS | metal2 | nsew,analog,default |
13 | DRAIN1 | metal2 | nsew |
14 | SOURCE1 | metal2 | nsew |
Description: Tunneling cpacitor using a standard varactor capacitor
Height: 1.690
Width: 2.220
Port Number | Label | Layer | Attributes |
---|
Description: step-up level shifter part
Height: 1.690
Width: 6.140
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 5.950
Width: 3.530
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | GATE1N | metal2 | nsew,analog,default |
2 | GATE2P | metal2 | nsew,analog,default |
3 | GATE1P | metal2 | nsew,analog,default |
4 | GATE2N | metal2 | nsew,analog,default |
5 | SOURCE1P | metal2 | nsew,analog,default |
6 | SOURCE2P | metal2 | nsew,analog,default |
7 | SOURCE2N | metal2 | nsew,analog,default |
8 | SOURCE1N | metal2 | nsew,analog,default |
9 | DRAIN1N | metal2 | nsew,analog,default |
10 | DRAIN2N | metal2 | nsew,analog,default |
11 | DRAIN1P | metal2 | nsew,analog,default |
12 | DRAIN2P | metal2 | nsew,analog,default |
14 | VGND | metal2 | nsew |
15 | WELL | metal2 | nsew |
Description: None
Height: 1.900
Width: 1.730
Port Number | Label | Layer | Attributes |
---|
Description: Tunneling capacitor using a standard varactor capacitor
Height: 7.010
Width: 10.430
Port Number | Label | Layer | Attributes |
---|
Description: single-element of WTA circuit
Height: 5.340
Width: 2.830
Port Number | Label | Layer | Attributes |
---|
Description: decoupling cap (intended as fill)
Height: 3.020
Width: 3.080
Port Number | Label | Layer | Attributes |
---|
Description: decoupling cap (intended as fill), variant
Height: 6.040
Width: 3.890
Port Number | Label | Layer | Attributes |
---|---|---|---|
1 | VPWR | metal2 | nsew |
2 | VGND | metal2 | nsew |
Description: None
Height: 1.910
Width: 2.560
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 3.170
Width: 4.430
Port Number | Label | Layer | Attributes |
---|
Description: local interconnect to m1 contact
Height: 0.290
Width: 0.230
Port Number | Label | Layer | Attributes |
---|
Description: local interconnect to m2 contact
Height: 0.330
Width: 0.340
Port Number | Label | Layer | Attributes |
---|
Description: m1 to m2 contact
Height: 0.320
Width: 0.320
Port Number | Label | Layer | Attributes |
---|
Description: m2 to m4 contact
Height: 0.750
Width: 0.790
Port Number | Label | Layer | Attributes |
---|
Description: metal capacitor layer contact to m4
Height: 0.750
Width: 0.790
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 0.290
Width: 0.670
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 0.610
Width: 0.890
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 0.900
Width: 2.080
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 2.720
Width: 0.820
Port Number | Label | Layer | Attributes |
---|
Description: overlap capacitor based capacitor (nFET)
Height: 1.290
Width: 1.290
Port Number | Label | Layer | Attributes |
---|
Description: overlap capacitor based capacitor
Height: 2.080
Width: 2.870
Port Number | Label | Layer | Attributes |
---|
Description: overlap capacitor based capacitor)
Height: 1.950
Width: 4.320
Port Number | Label | Layer | Attributes |
---|
Description: overlap capacitor based capacitor
Height: 1.640
Width: 4.000
Port Number | Label | Layer | Attributes |
---|
Description: Part of the W/L=100 pFET transistor
Height: 2.870
Width: 3.390
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 1.210
Width: 1.610
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 0.850
Width: 1.610
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 1.210
Width: 1.720
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 1.570
Width: 1.870
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 1.570
Width: 1.870
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 1.570
Width: 1.870
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 1.450
Width: 1.910
Port Number | Label | Layer | Attributes |
---|
Description: pFET transistor used in DAC block
Height: 0.990
Width: 2.030
Port Number | Label | Layer | Attributes |
---|
Description: None
Height: 2.990
Width: 1.860
Port Number | Label | Layer | Attributes |
---|
Description: polysilicon layer to li contact
Height: 0.330
Width: 0.270
Port Number | Label | Layer | Attributes |
---|
Description: polysilicon layer to m1 contact
Height: 0.510
Width: 0.330
Port Number | Label | Layer | Attributes |
---|
Description: polysilicon layer to m2 contact
Height: 0.550
Width: 0.330
Port Number | Label | Layer | Attributes |
---|
Description: contact to a well block, typically used for contacting tunneling junctions in a well.
Height: 1.860
Width: 1.730
Port Number | Label | Layer | Attributes |
---|
Description: A design which contains all cells (?)
Height: 6.670
Width: 1.770
Port Number | Label | Layer | Attributes |
---|
Description: ?? Is this part of the library?
Height: 7.010
Width: 14.680
Port Number | Label | Layer | Attributes |
---|