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dldt

Deep Learning Deployment Toolkit

dldt-samples

dma-example

Sample Vivado DMA project

dma_issue_demonstrator

This minimal Vivado project aims to demonstrate an issue with the AXI DMA IP from Xilinx.

dma_stuff_on_zcu104

This project will attempt to use the fancy DMA controllers of the Zynq+ to move data between PS and PL DDR4 banks.

dnn

dnnweaver

fork from bitbucket.org/hsharma35/dnnweaver.public

dnnweaver-1

dnnweaver source (Hardik Sharma)

dnnweaver-2

dnnweaver-zed-board-

This is an adaptation of DNNweaver

dpdk_zcu102

Implement the DPDK PMD for customize Ring Buffer DRM on Xilinx ZCU102

ece395a

Neural net implementation on an FPGA.

ece496_201718

ece527

ece527-1

ee493_vhdl

embedded-fpga

Github Repo for Embedded FPGA course by Vincent Claes

embeddedcnn

Deploy CNN accelerator in embedded OS using SDSOC and Xilinx Ultrascale+ ZCU102 platform.

engineering-accelerator-fpga

examples

Examples for kernel modules and epiphany for use with the parallella

face_recognition

项目名称为：自建数据集人脸识别。该项目利用电脑自带摄像头或者已有照片进行人脸数据集建立，再进行人脸检测，人脸识别，人脸预测，包括数据采集、数据预处理、建模、模型训练、模型使用预测全过程。项目使用Openc3进行数据采集、数据预处理，Keras 进行建模，模型参考了VGG16网络，包含4个卷积层，5个LeRu层，2个池化层，3个Dropout层，2个全连接层，1个flatten层，1个分类层，共18层。

faster_rcnn

Faster R-CNN

finn

A Framework for Fast, Scalable Binarized Neural Network Inference

fletcher

A framework to integrate FPGA accelerators with Apache Arrow

fpga

fpga-accelerator-for-aes-lenet-vgg16

FPGA/AES/LeNet/VGG16

fpga-based-jpeg-codec-accelerator

High-performance FPGA-based JPEG codec accelerator

fpga-design-flow-using-vivado

This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite

fpga-guide.github.io

fpga-neural-network-