Comments (5)
Not tested.
from grbl-lpc.
Ok, here my change, works for me :)
--- a/grbl/config.h
+++ b/grbl/config.h
@@ -660,9 +660,9 @@
// Define homing/hard limit switch input pins and limit interrupt vectors.
// NOTE: All limit bit pins must be on the same port, but not on a port with other input pins (CONTROL).
-#define LIMIT_DDR LPC_GPIO0->FIODIR
-#define LIMIT_PIN LPC_GPIO0->FIOPIN
-#define LIMIT_PORT LPC_GPIO0->FIOPIN
+#define LIMIT_DDR LPC_GPIO1->FIODIR
+#define LIMIT_PIN LPC_GPIO1->FIOPIN
+#define LIMIT_PORT LPC_GPIO1->FIOPIN
#define X_LIMIT_BIT 25 // X-MIN=24, X-MAX=25
#define Y_LIMIT_BIT 27 // Y-MIN=26, Y-MAX=27
#define Z_LIMIT_BIT 29 // Z-MIN=28, Z-MAX=29
#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)) // All limit bits
from grbl-lpc.
Whoops. Good catch; port was wrong.
from grbl-lpc.
Hi how can i compile the firmware, here is a manual but is not working for me https://github.com/gnea/grbl-LPC/wiki thank you
from grbl-lpc.
@00alkskodi00 Please open a new issue instead of capturing an old closed issue!
from grbl-lpc.
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