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  /** ADC high threshold register high (HTRH at 0x5408) */
  union {

    /// bytewise access to HTRH
    uint8_t  byte;

    /// bitwise access to register HTRH
    struct {
      BITS   HT                  : 8;      // bits 0-7
    };  // HTRH bitfield

    /// register _ADC1_HTRH reset value
    #define sfr_ADC1_HTRH_RESET_VALUE   ((uint8_t) 0x03)

  } HTRH;


  /** ADC high threshold register low (HTRL at 0x5409) */
  union {

    /// bytewise access to HTRL
    uint8_t  byte;

    /// bitwise access to register HTRL
    struct {
      BITS   HT                  : 2;      // bits 0-1
      BITS                       : 6;      // 6 bits
    };  // HTRL bitfield

    /// register _ADC1_HTRL reset value
    #define sfr_ADC1_HTRL_RESET_VALUE   ((uint8_t) 0xFF)

  } HTRL;

/** SPI Rx CRC register (RXCRCR at 0x5206) */
 union {

   /// bytewise access to RXCRCR
   uint8_t  byte;

   /// bitwise access to register RXCRCR
   struct {
     BITS   RXCRC               : 8;      // bits 0-7
   };  // RXCRCR bitfield

   /// register _SPI_RXCRCR reset value
   #define sfr_SPI_RXCRCR_RESET_VALUE   ((uint8_t) 0xFF)

 } RXCRCR;


 /** SPI Tx CRC register (TXCRCR at 0x5207) */
 union {

   /// bytewise access to TXCRCR
   uint8_t  byte;

   /// bitwise access to register TXCRCR
   struct {
     BITS   TXCRC               : 8;      // bits 0-7
   };  // TXCRCR bitfield

   /// register _SPI_TXCRCR reset value
   #define sfr_SPI_TXCRCR_RESET_VALUE   ((uint8_t) 0xFF)

 } TXCRCR;

$ grep '^      BITFIELD_UINT' -R * | less
...
STM8S105K4.h:      BITFIELD_UINT   SWIMCLK    : 1;      // bit 0
STM8S105K4.h:      BITFIELD_UINT              : 7;      // 7 bits
STM8S105K4.h:      BITFIELD_UINT   C          : 1;      // bit 0
STM8S105K4.h:      BITFIELD_UINT   Z          : 1;      // bit 1
STM8S105K4.h:      BITFIELD_UINT   NF         : 1;      // bit 2
STM8S105K4.h:      BITFIELD_UINT   I0         : 1;      // bit 3
STM8S105K4.h:      BITFIELD_UINT   H          : 1;      // bit 4
STM8S105K4.h:      BITFIELD_UINT   I1         : 1;      // bit 5
STM8S105K4.h:      BITFIELD_UINT              : 1;      // 1 bit
STM8S105K4.h:      BITFIELD_UINT   V          : 1;      // bit 7
STM8S105K4.h:      BITFIELD_UINT   SWO        : 1;      // bit 0
STM8S105K4.h:      BITFIELD_UINT   AL         : 1;      // bit 1
STM8S105K4.h:      BITFIELD_UINT              : 6;      // 6 bits
STM8S105K4.h:      BITFIELD_UINT   FIX        : 1;      // bit 0
STM8S105K4.h:      BITFIELD_UINT   IE         : 1;      // bit 1
STM8S105K4.h:      BITFIELD_UINT   AHALT      : 1;      // bit 2
STM8S105K4.h:      BITFIELD_UINT   HALT       : 1;      // bit 3
STM8S105K4.h:      BITFIELD_UINT              : 4;      // 4 bits
STM8S105K4.h:      BITFIELD_UINT   PRG        : 1;      // bit 0
STM8S105K4.h:      BITFIELD_UINT              : 3;      // 3 bits
STM8S105K4.h:      BITFIELD_UINT   FPRG       : 1;      // bit 4
...