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gb-research's Issues

SM83: irq_ack

First of all thank you for your hard work reverse engineering the SM83.

I encountered an issue with irq_ack:

irq_ack <= irq_prio and int_s110;

irq_ack goes high during cycle int_s110. This means it goes high when PHI is high.

irq_latch is latched when PHI is high. This makes sense because PHI stays high when the CPU is halted.

The issue is that this way irq_ack acknowledges the IRQ when PHI is high and so irq_latch immediately goes low before the address is read during writeback. It will always jump to address $0000.

Most likely it should be like this:

irq_ack <= irq_prio and int_s110 and writeback;

This way it acknowledges the IRQ when PHI is low and irq_latch has stopped latching.

PS irq_prio is a logic vector and int_s110 is a single logic signal. It is strange that these can be simply ANDed together. VHDL is usually very strict.

MGB-CPU-01 and MGB-ECPU-01 diference

Hello there !

Can you tell me what the diference between MGB-CPU-01 and MGB-ECPU-01 motherboard ?

I know LCPU mobo add the LED and change power board layout in second revision, but ECPU doesn't really look different from the first MGB-CPU-01 motherboard.

Have you the clue ?

Thanks ;)

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