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stanfordquadruped

stm32mp1-som

surround-view

surround-view-system-introduction

A full Python implementation for real car surround view system

surround-view-system-introduction-imported

surround-view-system-using-4-fisheye-cameras-in-raspberry-pi-3

systolic-array

verilog实现TPU中的脉动阵列计算卷积的module

systolic-array-implementation-in-rtl-for-tpu

IC implementation of Systolic Array for TPU

tc358870

Hardware & Software for the Toshiba TC358870XBG HDMI to MIPI-DSI bridge chip.

temporal-shift-module

[ICCV 2019] TSM: Temporal Shift Module for Efficient Video Understanding

tensil

Open source machine learning accelerators

tensorflow

An Open Source Machine Learning Framework for Everyone

tensorflow2_tutorials_chinese

tensorflow2中文教程，持续更新(当前版本:tensorflow2.0)，tag: tensorflow 2.0 tutorials

tinyml

This repo is for Efinix TinyML platform, which offers end-to-end flow that facilitates TinyML solution deployment on Efinix FPGAs.

tinyml-1

tinyml-cookbook

TinyML Cookbook, published by Packt

tinytpu

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

tpu-tensor-processing-unit

IC implementation of TPU

tt_digilent_jtag_hs2

用于xilinx平台的简易自制下载器。

u-boot-xlnx

The official Xilinx u-boot repository

unprocessing

usb3_mipi_csi2_rx_v2_crosslink_nx

MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX with Hard MIPI PHY. Gbps UVC Video Stream Over USB 3.0 with Cypress FX3, Currently WIP

verilog-for-mic-in-matrix-creator

Explanation of FPGA code for 8 PDM microphones in Matrix Creator

vitis-ai

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.

vitis-ai-tutorials

vitis-tutorials

Vitis In-Depth Tutorials

vitis_ai_custom_platform_flow

This project is trying to create a base vitis platform to run with DPU

wukong-robot

🤖 wukong-robot 是一个简单、灵活、优雅的中文语音对话机器人/智能音箱项目，还可能是首个支持脑机交互的开源智能音箱项目。

x-track

A GPS bicycle speedometer that supports offline maps and track recording

xilinx-project

This is use FPGA of Xilinx ZYNQ-7000 ZC702